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Part: 5962-9762101Q2A

Category:
 Interface and Interconnect
   -> LVDS (Low Voltage Differential Signaling)

Description: ti SN55LVDS31, Quad LVDS Transmitter

Company: Texas Instruments, Inc.

Datasheet: Download 5962-9762101Q2A datasheet     File size : 311 kB

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Datasheet text preview:
SN55LVDS31, SN65LVDS31, SN65LVDS3487, SN65LVDS9638 HIGH-SPEED DIFFERENTIAL LINE DRIVERS
SLLS261J ­ JULY 1997 ­ REVISED OCTOBER 2002

D D D D D D D D D D

Meet or Exceed the Requirements of ANSI TIA/EIA-644 Standard Low-Voltage Differential Signaling With Typical Output Voltage of 350 mV and 100- Load Typical Output Voltage Rise and Fall Times of 500 ps (400 Mbps) Typical Propagation Delay Times of 1.7 ns Operate From a Single 3.3-V Supply Power Dissipation 25 mW Typical Per Driver at 200 MHz Driver at High Impedance When Disabled or With VCC = 0 Bus-Terminal ESD Protection Exceeds 8 kV Low-Voltage TTL (LVTTL) Logic Input Levels Pin Compatible With AM26LS31, MC3487, and µA9638

SN55LVDS31 . . . J OR W SN65LVDS31 . . . D OR PW (Marked as LVDS31 or 65LVDS31) (TOP VIEW)

1A 1Y 1Z G 2Z 2Y 2A GND

1 2 3 4 5 6 7 8

16 15 14 13 12 11 10 9

VCC 4A 4Y 4Z G 3Z 3Y 3A

SN55LVDS31FK (TOP VIEW)

V CC 3A
16 15 14 13 12 11 10 9 8 7 6 5

NC
1

1Y

1A

3

2

20 19 18 4Y 17 4Z 16 NC 15 G 14 3Z

1Z G NC 2Z 2Y

4 5 6 7 8 9 10 11 12 13

description
The SN55LVDS31, SN65LVDS31, SN65LVDS3487, and SN65LVDS9638 are differential line drivers that implement the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as TIA/EIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. Any of the four current-mode drivers will deliver a minimum differential output voltage magnitude of 247 mV into a 100- load when enabled. The intended application of these devices and signaling technique is both point-to-point and multidrop (one driver and multiple receivers) data transmission over controlled impedance media of approximately 100 . The transmission media may be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise coupling to the environment. The SN65LVDS31, SN65LVDS3487, and SN65LVDS9638 are characterized for operation from ­40°C to 85°C. The SN55LVDS31 is characterized for operation from ­55°C to 125°C.

2A

SN65LVDS3487D (Marked as LVDS3487 or 65LVDS3487) (TOP VIEW)

GND

NC

1A 1Y 1Z 1,2EN 2Z 2Y 2A GND

1 2 3 4 5 6 7 8

SN65LVDS9638D (Marked as DK638 or LVDS38) SN65LVDS9638DGN (Marked as L38) SN65LVDS9638DGK (Marked as AXG) (TOP VIEW)

VCC 1A 2A GND

1 2 3 4

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright 2002, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.

POST OFFICE BOX 655303

· DALLAS, TEXAS 75265

3Y VCC 4A 4Y 4Z 3,4EN 3Z 3Y 3A 1Y 1Z 2Y 2Z

4A

1

SN55LVDS31, SN65LVDS31, SN65LVDS3487, SN65LVDS9638 HIGH-SPEED DIFFERENTIAL LINE DRIVERS
SLLS261J ­ JULY 1997 ­ REVISED OCTOBER 2002

AVAILABLE OPTIONS PACKAGE TA (D) SN65LVDS31D ­40°C to 85°C ­55°C to 125°C SN65LVDS3487D SN65LVDS9638D -- -- SMALL OUTLINE (PW) SN65LVDS31PW -- -- -- -- MSOP -- -- SN65LVDS9638DGN SN65LVDS9638DGK -- CHIP CARRIER (FK) -- -- -- -- SNJ55LVDS31FK CERAMIC DIP (J) -- -- -- -- SNJ55LVDS31J FLAT PACK (W) -- -- -- -- SNJ55LVDS31W SN55LVDS31W

logic symbol
SN55LVDS31, SN65LVDS31 4 12 1 EN

'LVDS31 logic diagram (positive logic)
G G 1A 2 3 6 5 1Y 1Z 2Y 2Z 3Y 3Z 4Y 4Z 4A 15 3A 2A 4 12 1 2 3 6 5 10 11 14 13

G G

1Y 1Z 2Y 2Z 3Y 3Z 4Y 4Z

1A

1

7

2A

7

9

3A

9

10 11

4A

15

14 13

This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

logic symbol
SN65LVDS3487 1,2EN 4 EN 2 3 6 5

SN65LVDS3487 logic diagram (positive logic)
1A 1Y 1Z 2Y 2Z 3A 10 11 14 13 3Y 3Z 4Y 4Z 4A 3,4EN 9 12 15 14 13 4Y 4Z 10 11 1,2EN 2A 1 4 7 6 5 2Y 2Z 3Y 3Z 2 3 1Y 1Z

1A

1

2A

7

3,4EN

12

EN

3A

9

4A

15

This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

2

POST OFFICE BOX 655303

· DALLAS, TEXAS 75265

SN55LVDS31, SN65LVDS31, SN65LVDS3487, SN65LVDS9638 HIGH-SPEED DIFFERENTIAL LINE DRIVERS
SLLS261J ­ JULY 1997 ­ REVISED OCTOBER 2002

logic symbol
SN65LVDS9638 1A 2 8 7 6 5 1Y 1Z 2Y 2Z

SN65LVDS9638 logic diagram (positive logic)
1A 2 8 7 6 5 1Y 1Z 2Y 2Z

2A

3

2A

3

This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

Function Tables
SN55LVDS31, SN65LVDS31 INPUT A H L H L X Open Open ENABLES G H H X X L H X G X X L L H X L OUTPUTS Y H L H L Z L L Z L H L H Z H H

H = high level, L = low level, X = irrelevant, Z = high impedance (off) SN65LVDS3487 INPUT A H L X Open ENABLE EN H H L H OUTPUTS Y H L Z L Z L H Z H

H = high level, L = low level, X = irrelevant, Z = high impedance (off) SN65LVDS9638 INPUT A H L Open OUTPUTS Y H L L Z L H H

H = high level, L = low level

POST OFFICE BOX 655303

· DALLAS, TEXAS 75265

3

SN55LVDS31, SN65LVDS31, SN65LVDS3487, SN65LVDS9638 HIGH-SPEED DIFFERENTIAL LINE DRIVERS
SLLS261J ­ JULY 1997 ­ REVISED OCTOBER 2002

equivalent input and output schematic diagrams
EQUIVALENT OF EACH A INPUT VCC EQUIVALENT OF G, G, 1,2EN OR 3,4EN INPUTS VCC TYPICAL OF ALL OUTPUTS VCC

50 Input 7V 300 k Input 7V

50 10 k 5 Y or Z Output 7V

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­0.5 V to 4 V Input voltage range, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­0.5 V to VCC + 0.5 V Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­65_C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltages, except differential I/O bus voltages, are with respect to the network ground terminal. DISSIPATION RATING TABLE DERATING FACTOR TA = 70°C POWER RATING ABOVE TA = 25°C 5.8 mW/°C 7.6 mW/°C 3.4 mW/°C 17.1 mW/°C 11.0 mW/°C 11.0 mW/°C 6.2 mW/°C 8.0 mW/°C 464 mW 608 mW 272 mW 1.37 W 880 mW 880 mW 496 mW 640 mW

PACKAGE D (8) D (16) DGK DGN FK J PW (16) W

TA 25°C POWER RATING 725 mW 950 mW 425 mW 2.14 W 1375 mW 1375 mW 774 mW 1000 mW

TA = 85°C POWER RATING 377 mW 494 mW 221 mW 1.11 W 715 mW 715 mW 402 mW 520 mW

TA = 125°C POWER RATING -- -- -- -- 275 mW 275 mW -- 200 mW

This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow.

recommended operating conditions
MIN Supply voltage, VCC High-level input voltage, VIH Low-level input voltage, VIL Operating free-air temperature, TA free-air tem SN65 prefix SN55 prefix ­40 ­55 3 2 0.8 85 125 NOM 3.3 MAX 3.6 UNIT V V V °C

4

POST OFFICE BOX 655303

· DALLAS, TEXAS 75265

SN55LVDS31, SN65LVDS31, SN65LVDS3487, SN65LVDS9638 HIGH-SPEED DIFFERENTIAL LINE DRIVERS
SLLS261J ­ JULY 1997 ­ REVISED OCTOBER 2002

SN55LVDS31 electrical characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS RL = 100 , RL = 100 , See Figure 3 See Figure 3 See Figure 3 VI = 0.8 V or 2 V, No load ICC Supply current VI = 0.8 or 2 V, Enabled VI = 0 or VCC, VIH = 2 VIL = 0.8 V VO(Y) or VO(Z) = 0 VOD = 0 VO = 0 or 2.4 V VCC = 0, VO = 2.4 V 3 Enabled, RL = 100 , Disabled See Figure 2 See Figure 2 MIN 247 ­50 1.125 ­50 50 9 25 0.25 4 0.1 ­4 1.2 TYP 340 MAX 454 50 1.375 50 150 20 35 1 20 10 ­24 ±12 ±1 ±4 µA µA mA µA µA pF mA UNIT mV mV V mV mV

VOD
VOD VOC(SS) VOC(SS) VOC(PP)

Differential output voltage magnitude
Change in differential output voltage magnitude between logic states Steady-state common-mode output voltage Change in steady-state common-mode output voltage between logic states Peak-to-peak common-mode output voltage

IIH IIL IOS IOZ IO(OFF) Ci

High-level input current Low-level input current Short-circuit output current output current High-impedance output current Power-off output current Input capacitance

All typical values are at TA = 25°C and with VCC = 3.3 V.

SN55LVDS31 switching characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER tPLH tPHL tr tf tsk(p) tsk(o) tPZH tPZL Propagation delay time, low-to-high-level output Propagation delay time, high-to-low-level output Differential output signal rise time (20% to 80%) Differential output signal fall time (80% to 20%) Pulse skew (|tPHL ­ tPLH|) Channel-to-channel output skew Propagation delay time, high-impedance-to-high-level output Propagation delay time, high-impedance-to-low-level output RL = 100 , CL = 10 pF, , , See Figure 2 TEST CONDITIONS MIN 0.5 1 0.4 0.4 TYP 1.4 1.7 0.5 0.5 0.3 0.3 5.4 2.5 8.1 7.3 MAX 4 4.5 1 1 0.6 0.6 15 15 17 15 UNIT ns ns ns ns ns ns ns ns ns ns

See Figure 4 Figure tPHZ Propagation delay time, high-level-to-high-impedance output tPLZ Propagation delay time, low-level-to-high-impedance output All typical values are at TA = 25°C and with VCC = 3.3 V. tsk(o) is the maximum delay time difference between drivers on the same device.

POST OFFICE BOX 655303

· DALLAS, TEXAS 75265

5




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