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Details, datasheet, quote on part number:74AC11175DWR
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Datasheet text preview:
54AC11175, 74AC11175 QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR
SCAS090 DECEMBER 1989 REVISED APRIL 1993
· · · · · ·
Applications Include: Buffer/Storage Registers, Shift Registers, Pattern Generators Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs
54AC11175 . . . J PACKAGE 74AC11175 . . . DW or N PACKAGE (TOP VIEW)
t
1Q 2Q 2Q GND GND GND GND 3Q 3Q 4Q
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
1Q CLR 1D 2D VCC VCC 3D 4D CLK 4Q
description
These positive-edge-triggered flipflops implement D-type flip-flop logic with a direct clear input. Information at the D inputs that meets the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output. The 54AC11175 is characterized for operation over the full military temperature range of 55°C to 125°C. The 74AC11175 is characterized for operation from 40°C to 85°C.
54AC11014 . . . FK PACKAGE (TOP VIEW)
CLR 1Q 1Q 2Q 2Q
4 5 6 7 8
3 2 1 20 19 18 17 16 15 14 9 10 11 12 13
1D 2D VCC VCC 3D 4D CLK 4Q 4Q 3Q
OUTPUTS D X H L X Q L H L Q0 Q H L H Q0
Copyright © 1993, Texas Instruments Incorporated
FUNCTION TABLE (each flip-flop) INPUTS CLR L H H H CLK X L
EPIC is a trademark of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
GND GND CND GND 3Q
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54AC11175, 74AC11175 QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR
SCAS090 DECEMBER 1989 REVISED APRIL 1993
logic symbol
19 CLR 12 CLK 18 R C1 20 1D 1 2 3 8 3D 14 9 10 4D 13 11 1Q 1Q 2Q 2Q 3Q 3Q 4Q 4Q
logic diagram (positive logic)
CLR 19
CLK 12 1D 18 1D C1 R 17 1 1Q 20 1Q
1D
2D
17
2D
1D C1 R
2 3
2Q 2Q
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the DW, J and N packages.
3D
14
1D C1 R
8 9
3Q 3Q
13 4D
1D C1 R
10 11
4Q 4Q
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC + 0.5 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC + 0.5 V Input clamp current, IIK (VI VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 mA Output clamp current, IOK (VO VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 200 mA Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
}Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
54AC11175, 74AC11175 QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR
SCAS090 DECEMBER 1989 REVISED APRIL 1993
recommended operating conditions
54AC11175 MIN VCC VIH Supply voltage High-level input voltage VCC = 3 V VCC = 4.5 V VCC = 5.5 V VCC = 3 V VIL Low-level input voltage VCC = 4.5 V VCC = 5.5 V VCC = 3 V VCC = 4.5 V VCC = 5.5 V IOL VI VO TA Low-level output current Input voltage Output voltage Input transition rise or fall rate Operating free-air temperature VCC = 3 V VCC = 4.5 V VCC = 5.5 V 0 0 0 55 3 2.1 3.15 3.85 0.9 1.35 1.65 4 24 24 12 24 24 VCC VCC 10 125 0 0 0 40 NOM 5 MAX 5.5 74AC11175 MIN 3 2.1 3.15 3.85 0.9 1.35 1.65 4 24 24 12 24 24 VCC VCC 10 85 V V ns/ V °C mA mA V V NOM 5 MAX 5.5 UNIT V
IOH
High-level output current
Dt /Dv
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS CONDITIONS VCC 3V IOH = 50 mA IOH = 4 mA IOH = 24 mA mA IOH = 50 mA{ IOH = 75 mA{ IOL = 50 mA IOL = 12 mA IOL = 24 mA 24 mA IOL = 50 mA IOL = 75 mA{ II ICC Ci VI = VCC or GND VI = VCC or GND, VI = VCC or GND IO = 0 4.5 V 5.5 V VOH 3V 4.5 V 5.5 V 5.5 V 5.5V 3V 4.5 V 5.5 V VOL 3V 4.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5V 4 ± 0.1 8 ±1 160 0.1 0.1 0.1 0.36 0.36 0.36 0.1 0.1 0.1 0.5 0.5 0.5 1.65 1.65 ±1 80 TA = 25°C 25°C MIN 2.9 4.4 5.4 2.58 3.94 4.94 TYP MAX 54AC11175 MIN 2.9 4.4 5.4 2.4 3.7 4.7 3.85 3.85 0.1 0.1 0.1 0.44 0.44 0.44 V MAX 74AC11175 UNIT MIN 2.9 4.4 5.4 2.48 3.8 4.8 V MAX
mA mA
pF
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
23
54AC11175, 74AC11175 QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR
SCAS090 DECEMBER 1989 REVISED APRIL 1993
timing requirements over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
TA = 25°C 25°C MIN fclock tw tsu th Clock frequency Pulse duration duration Setup time before CLK time before CLK Hold time, data after CLK CLR low CLK high or low Data CLR inactive 0 5.5 5.5 8 8 0.5 MAX 90 54AC11175 MIN 0 5.5 5.5 8 8 0.5 MAX 90 74AC11175 MIN 0 5.5 5.5 8 8 0.5 MAX 90 MHz ns ns ns UNIT
timing requirements over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
TA = 25°C 25°C MIN fclock tw tsu th Clock frequency Pulse duration duration Setup time before CLK time before CLK Hold time, data after CLK CLR low CLK high or low Data CLR inactive 0 4 4 5.5 5.5 0.5 MAX 125 54AC11175 MIN 0 4 4 5.5 5.5 0.5 MAX 125 74AC11175 MIN 0 4 4 5.5 5.5 0.5 MAX 125 MHz ns ns ns UNIT
switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER fmax tPLH tPHL tPLH tPHL Any Q CLR CLR CLK CLK Any Q Any Q Any Q Any Q Any Q Any Q Any Q FROM (INPUT) TO (OUTPUT) MIN 90 2.6 2.6 2.5 2.5 2.4 2.4 1.7 1.7 TA = 25°C TYP MAX 120 7 7 10 10 6.8 6.8 9.4 9.4 8.7 8.7 11.6 11.6 8.7 8.7 11.7 11.7 54AC11175 MIN 90 2.6 2.6 2.5 2.5 2.4 2.4 1.7 1.7 9.9 9.9 13 13 9.4 9.4 13 13 MAX 74AC11175 MIN 90 2.6 2.6 2.5 2.5 2.4 2.4 1.7 1.7 9.3 9.3 12.4 12.4 9.1 9.1 12.5 12.5 MAX UNIT MHz ns ns ns ns
PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.
24
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
54AC11175, 74AC11175 QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR
SCAS090 DECEMBER 1989 REVISED APRIL 1993
switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER fmax tPLH tPHL tPLH tPHL Any Q CLR CLR CLK CLK Any Q Any Q Any Q Any Q Any Q Any Q Any Q FROM (INPUT) TO (OUTPUT) MIN 125 2.2 2.2 2.4 2.4 2.2 2.2 1.9 1.9 TA = 25°C TYP MAX 150 4.5 4.5 6.7 6.7 4.5 4.5 6.4 6.4 6.3 6.3 8.5 8.5 6.3 6.3 8.5 8.5 54AC11175 MIN 125 2.2 2.2 2.4 2.4 2.2 2.2 1.9 1.9 7.1 7.1 9.7 9.7 7.2 7.2 9.7 9.7 MAX 74AC11175 MIN 125 2.2 2.2 2.4 2.4 2.2 2.2 1.9 1.9 6.8 6.8 9.3 9.3 6.9 6.9 9.3 9.3 MAX UNIT MHz ns ns ns ns
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER Cpd Power dissipation capacitance TEST CONDITIONS CL = 50 pF, f = 1 MHz TYP 48 UNIT pF
PARAMETER MEASUREMENT INFORMATION
From Output Under Test CL = 50 pF (see Note A) 500 tw VCC Input 50% 50% 0V
LOAD CIRCUIT
VOLTAGE WAVEFORMS
Input (see Note B) Timing Input (see Note B) tsu Data Input 50% 50% th VCC 50% 0V Out-of-Phase Output VOLTAGE WAVEFORMS tPHL VCC 0V In-Phase Output tPLH
VCC 50% 50% 0V tPHL 50% VCC VOH 50% VCC VOL tPLH 50% VCC VOH 50% VCC VOL
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr = 3 ns, tf = 3 ns. C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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