Members of the Texas Instruments Widebus TM Family 3-State True Outputs Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise EPIC TM (Enhanced-Performance Implanted CMOS) 1-µm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic 300-mil Shrink Small-Outline (DL) Package Using 25-mil Center-to-Center Pin Spacings and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Pin Spacings
The 'AC16472 are 18-bit registered transceivers that contain two sets of D-type latches for temporary storage of data flowing in either direction. They can be used as two 9-bit transceivers or one 18-bit transceiver. Separate latch-enable (LEAB or LEBA) and output-enable (OEAB or OEBA) inputs are provided for each register to permit independent control in either direction of data flow.
27 30 When OEAB and LEAB are both low, the A-to-B 28 29 latches are transparent; a subsequent low-to-high transition of LEAB puts the A latches in the storage mode. With OEAB low, the B outputs are active and reflect the data present at the output of the A latches. Data flow from A is similar, but requires the use of the LEBA and OEBA inputs.
The 74AC16472 is packaged in TI's shrink small-outline package (DL), which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area. The 54AC16472 is characterized for operation over the full military temperature range to 125°C. The 74AC16472 is characterized for operation from to 85°C.
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FUNCTION TABLE INPUTS LEAB OEAB OUTPUT B0 H
L A-to-B data flow is shown: B-to-A flow is similar but uses LEBA and OEBA. Output level before the indicated steady-state input conditions were established
§ This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.