|Category||Semiconductors => Logic => Buffer/Driver/Transceiver => Registered Transceiver|
|Part family||74AC16652 16-Bit Bus Transceivers And Registers With 3-State Outputs|
|Title||Bus Oriented Circuits|
|Description||16-Bit Bus Transceivers And Registers With 3-State Outputs 56-SSOP -40 to 85|
|Company||Texas Instruments, Inc.|
|Datasheet||Download 74AC16652 datasheet
|ICC @ Nom Voltage(Max)(mA)||0.08|
|Operating Temperature Range(C)||-40 to 85|
|Output Drive (IOL/IOH)(Max)(mA)||-24/24|
|Approx. Price (US$)||5.77 | 1ku|
|F @ Nom Voltage(Max)(Mhz)||100|
|tpd @ Nom Voltage(Max)(ns)||15.4,10.2|
|Pin nb||Package type||Ind std||JEDEC code||Package qty||Carrier||Device mark||Width (mm)||Length (mm)||Thick (mm)||Pitch (mm)|
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This report contains a comprehensive collection of the input and output characteristic curves of typical integrated circuits from various logic families. These curves go beyond the information given in data sheets by providing additional details regarding | Doc
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|• Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | Doc|
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Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV, as generated by an IEC ESD simulator to determine the level of ISD protection provi | Doc
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Members of the Texas Instruments Widebus TM Family Independent Registers and Enables for A and B Buses Multiplexed Real-Time and Stored Data Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Pin Configurations Minimize High-Speed Switching Noise EPIC TM (Enhanced-Performance Implanted CMOS) 1-µm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic 300-mil Shrink Small-Outline (DL) Packages Using 25-mil Center-to-Center Pin Spacings and 380-mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-mil Center-to-Center Pin Spacingsdescription
The 'AC16652 are 16-bit bus transceivers that consist of D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. They can be used as two 8-bit transceivers or one 16-bit transceiver. Complementary output-enable (OEAB and OEBA) inputs are provided to control the transceiver functions. Select-control (SAB and SBA) inputs are provided to select whether real-time or stored data is transferred. A low input level selects real-time data, and a high input level selects stored data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the 'AC16652.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC and Widebus are trademarks of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303
Data on the or B bus, or both, can be stored in the internal D flip-flops by low-to-high transitions at the appropriate clock (CLKAB or CLKBA) inputs regardless of the levels on the select-control or output-enable inputs. When SAB and SBA are in the real-time transfer mode, it is also possible to store data without using the internal D-type flip-flops by simultaneously enabling OEAB and OEBA. In this configuration, each output reinforces its input. Thus, when all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last state. The 74AC16652 is packaged in TI's shrink small-outline package (DL), which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area. The 54AC16652 is characterized for operation over the full military temperature range to 125°C. The 74AC16652 is characterized for operation from to 85°C.
FUNCTION TABLE INPUTS OEAB OEBA CLKAB CLKBA SAB SBA A1A8 Input Unspecified Output Input Output DATA I/O B1B8 Input Unspecified Output Input Output OPERATION OR FUNCTION Isolation Store A and B data Store A, hold B Store A in both registers Hold A, store B Store B in both registers Real-time B data to A bus Stored B data to A bus Real-time A data to B bus Stored A data to B bus Stored A data to B bus and stored B data to A bus
The data-output functions may be enabled or disabled by a variety of level combinations at OEAB or OEBA. Data-input functions are always enabled; i.e., data at the bus terminals is stored on every low-to-high transition on the clock inputs. Select control = L; clocks can occur simultaneously. Select control = H; clocks must be staggered in order to load both registers.
BUS B SBA X REAL-TIME TRANSFER BUS A TO BUS B CLKAB L CLKBA L SAB H BUS B SBA H TRANSFER STORED DATA TO A AND/OR B
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