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Details, datasheet, quote on part number: 74AC16652DLR
Part74AC16652DLR
CategorySemiconductors => Logic => Buffer/Driver/Transceiver => Registered Transceiver
Part family74AC16652 16-Bit Bus Transceivers And Registers With 3-State Outputs
TitleRegistered Transceivers
Description16-Bit Bus Transceivers And Registers With 3-State Outputs 56-SSOP -40 to 85
CompanyTexas Instruments, Inc.
StatusACTIVE
ROHSCompliant
SampleNo
DatasheetDownload 74AC16652DLR datasheet
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Specifications 
Output Drive (IOL/IOH)(Max)(mA)-24/24
Operating Temperature Range(C)-40 to 85
VCC(Min)(V)3
RatingCatalog
Schmitt TriggerNo
Package GroupSSOP
Voltage(Nom)(V)3.3,5
F @ Nom Voltage(Max)(Mhz)100
Bits(#)16
Output TypeCMOS
VCC(Max)(V)5.5
Approx. Price (US$)5.77 | 1ku
Input TypeCMOS
ICC @ Nom Voltage(Max)(mA)0.08
Technology FamilyAC
tpd @ Nom Voltage(Max)(ns)15.4,10.2
  Mecanical Data
Pin nbPackage typeInd stdJEDEC codePackage qtyCarrierDevice markWidth (mm)Length (mm)Thick (mm)Pitch (mm)
56DLSSOPR-PDSO-G1000LARGE T&RAC16652 7.4918.412.59.635
Application notes
• Input and Output Characteristics of Digital Integrated Circuits
This report contains a comprehensive collection of the input and output characteristic curves of typical integrated circuits from various logic families. These curves go beyond the information given i | Doc
• TI IBIS File Creation, Validation, and Distribution Processes
The Input/Output Buffer Information Specification (IBIS), also known as ANSI/EIA-656, has become widely accepted among electronic design automation (EDA) vendors, semiconductor vendors, and system des | Doc
• Live Insertion
Many applications require the ability to exchange modules in electronic systems without removing the supply voltage from the module (live insertion). For example an electronic telephone exchange must | Doc
• Implications of Slow or Floating CMOS Inputs (Rev. C)
When using CMOS and BiCMOS devices, a designer must understand the characteristics of these families and the way inputs and outputs behave in systems. It is very important for the designer to follow a | Doc
• Shelf-Life Evaluation of Lead-Free Component Finishes
The integrated circuit (IC) industry is converting to lead (Pb)-free termination finishes for leadframe-based packages. IC component users need to know the maximum length of time that components can b | Doc
• Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | Doc
• Designing With Logic (Rev. C)
Data sheets, which usually give information on device behavior only under recommended operating conditions, may only partially answer engineering questions that arise during the development of systems | Doc
• Introduction to Logic | Doc
• CMOS Power Consumption and CPD Calculation (Rev. B)
Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a res | Doc
• Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
Though low power consumption is a feature of CMOS devices, sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supp | Doc

 

Features, Applications

Members of the Texas Instruments Widebus TM Family Independent Registers and Enables for A and B Buses Multiplexed Real-Time and Stored Data Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Pin Configurations Minimize High-Speed Switching Noise EPIC TM (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125C Package Options Include Plastic 300-mil Shrink Small-Outline (DL) Packages Using 25-mil Center-to-Center Pin Spacings and 380-mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-mil Center-to-Center Pin Spacings

description

The 'AC16652 are 16-bit bus transceivers that consist of D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. They can be used as two 8-bit transceivers or one 16-bit transceiver. Complementary output-enable (OEAB and OEBA) inputs are provided to control the transceiver functions. Select-control (SAB and SBA) inputs are provided to select whether real-time or stored data is transferred. A low input level selects real-time data, and a high input level selects stored data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the 'AC16652.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC and Widebus are trademarks of Texas Instruments Incorporated.

UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303

Data on the or B bus, or both, can be stored in the internal D flip-flops by low-to-high transitions at the appropriate clock (CLKAB or CLKBA) inputs regardless of the levels on the select-control or output-enable inputs. When SAB and SBA are in the real-time transfer mode, it is also possible to store data without using the internal D-type flip-flops by simultaneously enabling OEAB and OEBA. In this configuration, each output reinforces its input. Thus, when all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last state. The 74AC16652 is packaged in TI's shrink small-outline package (DL), which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area. The 54AC16652 is characterized for operation over the full military temperature range to 125C. The 74AC16652 is characterized for operation from to 85C.

FUNCTION TABLE INPUTS OEAB OEBA CLKAB CLKBA SAB SBA A1A8 Input Unspecified Output Input Output DATA I/O B1B8 Input Unspecified Output Input Output OPERATION OR FUNCTION Isolation Store A and B data Store A, hold B Store A in both registers Hold A, store B Store B in both registers Real-time B data to A bus Stored B data to A bus Real-time A data to B bus Stored A data to B bus Stored A data to B bus and stored B data to A bus

The data-output functions may be enabled or disabled by a variety of level combinations at OEAB or OEBA. Data-input functions are always enabled; i.e., data at the bus terminals is stored on every low-to-high transition on the clock inputs. Select control = L; clocks can occur simultaneously. Select control = H; clocks must be staggered in order to load both registers.

BUS B SBA X REAL-TIME TRANSFER BUS A TO BUS B CLKAB L CLKBA L SAB H BUS B SBA H TRANSFER STORED DATA TO A AND/OR B


 

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