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Details, datasheet, quote on part number:74ALVCH32245ZKER
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Datasheet text preview:
SCES282C - OCTOBER 1999 - REVISED OCTOBER 2003
SN74ALVCH32245 32 BIT BUS TRANSCEIVER WITH 3 STATE OUTPUTS
D Member of the Texas Instruments D D D D
Widebus+ Family Operates From 1.65 V to 3.6 V Max tpd of 3 ns at 3.3 V ±24-mA Output Drive at 3.3 V Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
D Latch-Up Performance Exceeds 100 mA Per D
JESD 78, Class II ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) - 1000-V Charged-Device Model (C101)
description/ordering information
This 32-bit noninverting bus transceiver is designed for 1.65-V to 3.6-V VCC operation. The SN74ALVCH32245 is designed for asynchronous communication between data buses. The control-function implementation minimizes external timing requirements. This device can be used as four 8-bit transceivers, two 16-bit transceivers, or one 32-bit transceiver. It allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. ORDERING INFORMATION
TA -40°C to 85°C PACKAGE LFBGA - GKE LFBGA - ZKE (Pb-free) Tape and reel ORDERABLE PART NUMBER SN74ALVCH32245KR 74ALVCH32245ZKER ACH245 TOP-SIDE MARKING
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each 8-bit section) INPUTS OE L L H DIR L H X OPERATION B data to A bus A data to B bus Isolation
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus+ is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 2003, Texas Instruments Incorporated
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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SCES282C - OCTOBER 1999 - REVISED OCTOBER 2003
SN74ALVCH32245 32 BIT BUS TRANSCEIVER WITH 3 STATE OUTPUTS
GKE OR ZKE PACKAGE (TOP VIEW) 1 A B C D E F G H J K L M N P R T 2 3 4 5 6
terminal assignments
1 A B C D E F G H J K L M N P R T 1B2 1B4 1B6 1B8 2B2 2B4 2B6 2B7 3B2 3B4 3B6 3B8 4B2 4B4 4B6 4B7 2 1B1 1B3 1B5 1B7 2B1 2B3 2B5 2B8 3B1 3B3 3B5 3B7 4B1 4B3 4B5 4B8 3 1DIR GND VCC GND GND VCC GND 2DIR 3DIR GND VCC GND GND VCC GND 4DIR 4 1OE GND VCC GND GND VCC GND 2OE 3OE GND VCC GND GND VCC GND 4OE 5 1A1 1A3 1A5 1A7 2A1 2A3 2A5 2A8 3A1 3A3 3A5 3A7 4A1 4A3 4A5 4A8 6 1A2 1A4 1A6 1A8 2A2 2A4 2A6 2A7 3A2 3A4 3A6 3A8 4A2 4A4 4A6 4A7
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SCES282C - OCTOBER 1999 - REVISED OCTOBER 2003
SN74ALVCH32245 32 BIT BUS TRANSCEIVER WITH 3 STATE OUTPUTS
logic diagram (positive logic)
1DIR A3 A4 2DIR 1OE E5 H3 H4
2OE
1A1
A5
2A1 A2
1B1
E2
2B1
To Seven Other Channels J3 J4 T3
To Seven Other Channels
3DIR
4DIR 3OE
T4
4OE
3A1
J5
4A1 J2
N5
3B1
N2
4B1
To Seven Other Channels
To Seven Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 4.6 V Input voltage range, VI: Except I/O ports (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 4.6 V I/O ports (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to VCC + 0.5 V Output-voltage range, VO (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous current through each VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA Package thermal impedance, JA (see Note 3): GKE/ZKE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. This value is limited to 4.6 V maximum. 3. The package thermal impedance is calculated in accordance with JESD 51-7.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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SCES282C - OCTOBER 1999 - REVISED OCTOBER 2003
SN74ALVCH32245 32 BIT BUS TRANSCEIVER WITH 3 STATE OUTPUTS
recommended operating conditions (see Note 4)
MIN VCC VIH Supply voltage VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V VCC = 1.65 V to 1.95 V VIL VI VO Low-level input voltage Input voltage Output voltage VCC = 1.65 V VCC = 2.3 V VCC = 2.7 V VCC = 3 V VCC = 1.65 V VCC = 2.3 V VCC = 2.7 V VCC = 3 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V 0 0 1.65 0.65 × VCC 1.7 2 0.35 × VCC 0.7 0.8 VCC VCC -4 -8 -12 -24 4 8 12 24 10 ns/V mA mA V V V V MAX 3.6 UNIT V
High-level input voltage
IOH
High-level output current
IOL
Low-level output current
t/v
Input transition rise or fall rate
TA Operating free-air temperature -40 85 °C NOTE 4: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SCES282C - OCTOBER 1999 - REVISED OCTOBER 2003
SN74ALVCH32245 32 BIT BUS TRANSCEIVER WITH 3 STATE OUTPUTS
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER IOH = -100 µA IOH = -4 mA VOH IOH = -8 mA IOH = -12 mA IOH = -24 mA IOL = 100 µA VOL IOL = 4 mA IOL = 8 mA IOL = 12 mA IOL = 24 mA II VI = VCC or GND VI = 0.58 V VI = 1.07 V VI = 0.7 V II(hold) VI = 1.7 V VI = 0.8 V VI = 2 V VI = 0 to 3.6 V IOZ§ ICC ICC Ci Cio Control inputs A or B ports VO = VCC or GND VI = VCC or GND, One input at VCC - 0.6 V, VI = VCC or GND VO = VCC or GND IO = 0 Other inputs at VCC or GND TEST CONDITIONS VCC 1.65 V to 3.6 V 1.65 V 2.3 V 2.7 V 3V 3V 1.65 V to 3.6 V 1.65 V 2.3 V 2.7 V 3V 3.6 V 1.65 V 1.65 V 2.3 V 2.3 V 3V 3V 3.6 V 3.6 V 3.6 V 3 V to 3.6 V 3.3 V 3.3 V 4 8 25 -25 45 -45 75 -75 ±500 ±10 80 750 µA µA µA pF µA MIN TYP MAX UNIT VCC-0.2 1.2 1.7 2.2 2.4 2.2 0.2 0.45 0.7 0.4 0.55 ±5 µA V V
pF All typical values are at VCC = 3.3 V, TA = 25°C. This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to another. § For I/O ports, the parameter IOZ includes the input leakage current.
switching characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)
PARAMETER tpd ten tdis FROM (INPUT) A or B OE OE TO (OUTPUT) B or A A or B A or B VCC = 1.8 V ± 0.15 V MIN ¶ ¶ ¶ MAX ¶ ¶ ¶ VCC = 2.5 V ± 0.2 V MIN 1 1 1 MAX 3.7 5.7 5.2 VCC = 2.7 V MIN MAX 3.6 5.4 4.6 VCC = 3.3 V ± 0.3 V MIN 1 1 1 MAX 3 4.4 4.1 ns ns ns UNIT
¶ This information was not available at the time of publication.
operating characteristics, TA = 25° C
PARAMETER Cpd Power dissipation capacitance Outputs enabled Outputs disabled TEST CONDITIONS CL = 50 pF, f = 10 MHz VCC = 1.8 V TYP ¶ ¶ VCC = 2.5 V TYP 22 4 VCC = 3.3 V TYP 29 5 UNIT pF
¶ This information was not available at the time of publication.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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