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Part: 74ALVCH32501ZKFR
Category:
Logic
-> Transceivers
-> Universal Bus Transceivers (UBTs)
Description: ti SN74ALVCH32501, 36-Bit Universal Bus Transceiver With 3-State Outputs
Company: Texas Instruments, Inc.
Datasheet: Download 74ALVCH32501ZKFR datasheet File size : 67 kB
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Datasheet text preview:
SN74ALVCH32501 36 BIT UNIVERSAL BUS TRANSCEIVER WITH 3 STATE OUTPUTS
SCES144E - OCTOBER 1998 - REVISED AUGUST 2003
D Member of the Texas Instruments D
D D D
Widebus+ Family UBT Transceiver Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, or Clocked Mode Operates From 1.65 V to 3.6 V Max tpd of 3.9 ns at 3.3 V ±24-mA Output Drive at 3.3 V
D Bus Hold on Data Inputs Eliminates the D D
Need for External Pullup/Pulldown Resistors Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A)
description/ordering information
This 36-bit universal bus transceiver is designed for 1.65-V to 3.6-V VCC operation. This device can be used as two 18-bit transceivers or one 36-bit transceiver. Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A data is stored in the latch/flip-flop on the low-to-high transition of CLKAB. When OEAB is high, the outputs are active. When OEAB is low, the outputs are in the high-impedance state. Data flow for B to A is similar to that of A to B, but uses OEBA, LEBA, and CLKBA. The output enables are complementary (OEAB is active high and OEBA is active low). To ensure the high-impedance state during power up or power down, OEBA should be tied to VCC through a pullup resistor and OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. ORDERING INFORMATION
TA -40°C to 85°C LFBGA - GKF LFBGA - ZKF (Pb-free) Tape and reel PACKAGE ORDERABLE PART NUMBER SN74ALVCH32501KR 74ALVCH32501ZKFR ACH501 TOP-SIDE MARKING
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. UBT and Widebus are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 2003, Texas Instruments Incorporated
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
1
SCES144E - OCTOBER 1998 - REVISED AUGUST 2003
SN74ALVCH32501 36 BIT UNIVERSAL BUS TRANSCEIVER WITH 3 STATE OUTPUTS
GKF OR ZKF PACKAGE (TOP VIEW) 1 A B C D E F G H J K L M N P R T U V W 2 3 4 5 6 1 A B C D E F G H J K L M N P R T U V W 1A2 1A4 1A6 1A8 1A10 1A12 1A14 1A15 1A17 NC 2A2 2A4 2A6 2A8 2A10 2A12 2A14 2A15 2A17 2 1A1 1A3 1A5 1A7 1A9 1A11 1A13 1A16 1A18 2LEAB 2A1 2A3 2A5 2A7 2A9 2A11 2A13 2A16 2A18 3 1LEAB 1OEAB GND VCC GND GND VCC GND 1OEBA 1LEBA 2OEAB GND VCC GND GND VCC GND 2OEBA 2LEBA 4 1CLKAB GND GND VCC GND GND VCC GND 1CLKBA GND GND GND VCC GND GND VCC GND 2CLKBA GND 5 1B1 1B3 1B5 1B7 1B9 1B11 1B13 1B16 1B18 2CLKAB 2B1 2B3 2B5 2B7 2B9 2B11 2B13 2B16 2B18 6 1B2 1B4 1B6 1B8 1B10 1B12 1B14 1B15 1B17 NC 2B2 2B4 2B6 2B8 2B10 2B12 2B14 2B15 2B17
terminal assignments
NC - No internal connection
FUNCTION TABLE INPUTS OEAB L H H H H H H LEAB X H H L L L L CLKAB X X X H L A X L H L H X X OUTPUT B Z L H L H B0 B0§
A-to-B data flow is shown; B-to-A flow is similar but uses OEBA, LEBA, and CLKBA. Output level before the indicated steady-state input conditions were established, provided that CLKAB was high before LEAB went low § Output level before the indicated steady-state input conditions were established
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN74ALVCH32501 36 BIT UNIVERSAL BUS TRANSCEIVER WITH 3 STATE OUTPUTS
SCES144E - OCTOBER 1998 - REVISED AUGUST 2003
logic diagram (positive logic)
1OEAB B3
1CLKAB
A4
1LEAB
A3
1LEBA
K3
1CLKBA
J4
1OEBA
J3
1A1
A2
1D C1 CLK 1D C1 CLK
A5
1B1
To 17 Other Channels
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
3
SCES144E - OCTOBER 1998 - REVISED AUGUST 2003
SN74ALVCH32501 36 BIT UNIVERSAL BUS TRANSCEIVER WITH 3 STATE OUTPUTS
logic diagram (positive logic)
2OEAB L3
2CLKAB
K5
2LEAB
K2
2LEBA
W3
2CLKBA
V4
2OEBA
V3
2A1
L2
1D C1 CLK 1D C1 CLK
L5
2B1
To 17 Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 4.6 V Input voltage range, VI: Except I/O ports (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 4.6 V I/O ports (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to VCC + 0.5 V Output voltage range, VO (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous current through each VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA Package thermal impedance, JA (see Note 3): GKF/ZKF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output-current ratings are observed. 2. This value is limited to 4.6 V maximum. 3. The package thermal impedance is calculated in accordance with JESD 51-7.
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN74ALVCH32501 36 BIT UNIVERSAL BUS TRANSCEIVER WITH 3 STATE OUTPUTS
SCES144E - OCTOBER 1998 - REVISED AUGUST 2003
recommended operating conditions (see Note 4)
MIN VCC VIH Supply voltage VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V VCC = 1.65 V to 1.95 V VIL VI VO Low-level input voltage Input voltage Output voltage VCC = 1.65 V VCC = 2.3 V VCC = 2.7 V VCC = 3 V VCC = 1.65 V VCC = 2.3 V VCC = 2.7 V VCC = 3 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V 0 0 1.65 0.65 × VCC 1.7 2 0.35 × VCC 0.7 0.8 VCC VCC -4 -12 -12 -24 4 12 12 24 10 ns/V mA mA V V V V MAX 3.6 UNIT V
High-level input voltage
IOH
High-level output current
IOL
Low-level output current
t/v
Input transition rise or fall rate
TA Operating free-air temperature -40 85 °C NOTE 4: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
5
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