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Details, datasheet, quote on part number:74FCT163H245APVCT
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Datasheet text preview:
Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered.
CY74FCT163245 CY74FCT163H245
SCCS051 - February 1997 - Revised March 2000
16-Bit Transceivers
Functional Description
These 16-bit transceivers are designed for use in bidirectional synchronous communication between two buses, where high speed and low power are required. Direction of data flow is controlled by (DIR), the Output Enable (OE) transfers data when LOW and isolates the buses when HIGH. The outputs are 24-mA balanced output drivers with current limiting resistors to reduce the need for external terminating resistors and provide for minimal undershoot and reduced ground bounce.. The CY74FCT163H245 has "bus hold" on the data inputs, which retains the input's last state whenever the input goes to high impedance. This eliminates the need for pull-up/down resistors and prevents floating inputs. The CY74FCT163245 is designed with inputs and outputs capable of being driven by 5.0V buses, allowing its use in mixed voltage systems as a translator. The outputs are also designed with a power off disable feature enabling its use in applications requiring live insertion.
Features
· Low power, pin-compatible replacement for LCX and LPT families · 5V tolerant inputs and outputs · 24 mA balanced drive outputs · Power-off disable outputs permits live insertion · Edge-rate control circuitry for reduced noise · FCT-C speed at 4.1 ns · Latch-up performance exceeds JEDEC standard no. 17 · Typical output skew 2000V CY74FCT163H245 · Bus hold on data inputs · Eliminates the need for external pull-up or pull-down resistors · Devices with bus hold are not recommended for translating rail-to-rail CMOS signals to 3.3V logic levels
Logic Block Diagrams CY74FCT163245, CY74FCT163H245
1DIR 1OE 1A1 1B1 1A2 1B2 1A3 1B3 1A4 1B4 1A5 1B5 1A6 1B6 1A7 1B7 1A8 1B8 2A8 2B8 2A7 2B7 2A6 2B6 2A5 2B5 2A4 2B4 2A3 2B3 2A2 2B2 2A1 2B1 2DIR 2OE
Pin Configuration
SSOP/TSSOP Top View
1DIR 1B1 1B2
1 2 3 4 5 6
48 47 46 45 44 43
1OE 1A1 1A2
GND 1B3
1B4
GND 1A3
1A4
VCC 1B5
1B6
7 163245 42 8 163H245 41 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
VCC 1A5
1A6
GND
1B7 1B8 2B1 2B2
GND
1A7 1A8 2A1 2A2
GND
2B3 2B4
GND
2A3 2A4
VCC 2B5
2B6
VCC 2A5
2A6
GND
2B7 2B8 2DIR
GND
2A7 2A8 2OE
Copyright
© 2000, Texas Instruments Incorporated
CY74FCT163245 CY74FCT163H245
Pin Description
Name OE DIR A B Direction Control Inputs or Three-State Outputs[1] Inputs or Three-State Outputs[1] Description Three-State Output Enable Inputs (Active LOW)
Maximum Ratings[3, 4]
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ......... 55°C to +125°C Ambient Temperature with Power Applied............ 55°C to +125°C Supply Voltage Range .......0.5V to 4.6V DC Input Voltage .......... 0.5V to +7.0V DC Output Voltage........ 0.5V to +7.0V DIR L H X Outputs Bus B Data to Bus A Bus A Data to Bus B High Z State Range Industrial DC Output Current (Maximum Sink Current/Pin) ...... 60 to +120 mA Power Dissipation .......... 1.0W
Function Table[2]
Inputs OE L L H
Operating Range
Ambient Temperature 40°C to +85°C VCC 2.7V to 3.6V
Electrical Characteristics for Non Bus Hold Devices Over the Operating Range VCC=2.7V to 3.6V
Parameter VIH VIL VH VIK IIH IIL IOZH IOZL IOS IOFF ICC ICC Description Input HIGH Voltage Input LOW Voltage Input Hysteresis[6] VCC=Min., IIN=18 mA VCC=Max., VI=5.5 VCC=Max., VI=GND VCC=Max., VOUT=5.5V VCC=Max., VOUT=GND VCC=Max., VOUT=GND VCC=0V, VOUT4.5V VIN0.2V, VIN>VCC0.2V VIN=VCC0.6V[8] VCC=Max. VCC=Max. 0.1 2.0 60 135 100 0.7 1.2 ±1 ±1 ±1 ±1 240 ±100 10 30 Input Clamp Diode Voltage Input HIGH Current Input LOW Current High Impedance Output Current (Three-State Output pins) High Impedance Output Current (Three-State Output pins) Shor t Circuit Current[7] Power-Off Disable Quiescent Power Supply Current Quiescent Power Supply Current (TTL inputs HIGH) Test Conditions All Inputs Min. 2.0 Typ.[5] Max. 5.5 0.8 Unit V V mV V µA µA µA µA mA µA µA µA
Note: 1. On the CY74FCT163H245, these pins have bus hold. 2. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don't Care. Z = High Impedance. 3. Operation beyond the limits set forth may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-air temperature range. 4. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground. 5. Typical values are at VCC=3.3V, TA = +25°C ambient. 6. This parameter is specified but not tested. 7. Not more than one output should be shor ted at a time. Duration of shor t should not exceed one second. The use of high-speed test apparatus and/or sample and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shor ting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last. 8. Per TTL driven input; all other inputs at VCC or GND.
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CY74FCT163245 CY74FCT163H245
Electrical Characteristics For Bus Hold Devices Over the Operating Range VCC=2.7V to 3.6V
Parameter VIH VIL VH VIK IIH IIL IBBH IBBL IBHHO IBHLO IOZH IOZL IOS IOFF ICC ICC Description Input HIGH Voltage Input LOW Voltage Input Hysteresis[6] Input Clamp Diode Voltage Input HIGH Current Input LOW Current Bus Hold Sustain Current on Bus Hold Input
[9]
Test Conditions All Inputs
Min. 2.0
Typ.[5]
Max. VCC 0.8
Unit V V mV V µA µA µA µA
100 VCC=Min., IIN=18 mA VCC=Max., VI=VCC VCC=Min. VI=2.0V VI=0.8V 50 +50 ±500 ±1 ±1 60 135 240 ±100 +40 +350 0.7 1.2 ±100 ±100
Bus Hold Overdrive Current on Bus Hold Input High Impedance Output Current (Three-State Output pins) High Impedance Output Current (Three-State Output pins) Shor t Circuit Current[7] Power-Off Disable Quiescent Power Supply Current Quiescent Power supply Current (TTL inputs HIGH)
[9]
VCC=Max., VI=1.5V VCC=Max., VOUT=VCC VCC=Max., VOUT=GND VCC=Max., VOUT=GND VCC=0V, VOUT4.5V VIN0.2V, VIN>VCC0.2V VCC=Max.
µA µA µA mA µA µA µA
VIN=VCC0.6V[8] VCC=Max.
Electrical Characteristics For Balanced Drive Devices Over the Operating Range VCC=2.7V to 3.6V
Parameter IODL IODH VOH Description Output LOW Dynamic Current[7] Test Conditions VCC=3.3V, VIN=VIH or VIL, VOUT=1.5V VCC=3.3V, VIN=VIH or VIL, VOUT=1.5V VCC=Min., IOH= 0.1 mA VCC=Min., IOH= 8 mA VCC=3.0V, IOH= 24 mA VOL Output LOW Voltage VCC=Min., IOL= 0.1mA VCC=Min., IOL= 24 mA
Notes: 9. Pins with bus hold are described in Pin Description. 10. VOH=VCC0.6V at rated current.
Min. 45 45 VCC0.2 2.4[10] 2.0
Typ.[5]
Max. 180 180
Unit mA mA V
Output HIGH Dynamic Current[7] Output HIGH Voltage
3.0 3.0 0.2 0.3 0.55
V V V
Capacitance[6](TA = +25°C, f = 1.0 MHz)
Parameter CIN COUT Description Input Capacitance Output Capacitance VIN = 0V VOUT = 0V Test Conditions Typ.[5] 4.5 5.5 Max. 6.0 8.0 Unit pF pF
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CY74FCT163245 CY74FCT163H245
Power Supply Characteristics
Parameter ICCD Description Dynamic Power Supply Current[11] Total Power Supply Current[12] Test Conditions VCC=Max., One Input Toggling, VIN=VCC or 50% Duty Cycle, VIN=GND Outputs Open, OE=GND VCC=Max., f1=10 MHz, 50% VIN=VCC or Duty Cycle, Outputs Open, One VIN=GND Bit Toggling, OE=GND VIN=VCC0.6V or VIN=GND VCC=Max., f1=2.5 MHz, 50% VIN=VCC or Duty Cycle, Outputs Open, Six- VIN=GND teen Bits Toggling, OE=GND VIN=VCC0.6V or VIN=GND Typ.[5] 50 Max. 75 Unit µA/MHz
IC
0.5 0.5 2.0 2.0
0.8 0.8 3.0[13] 3.3[13]
mA mA mA mA
Switching Characteristics Over the Operating Range VCC=3.0V to 3.6V[14,15]
CY74FCT163245A CY74FCT163H245A Parameter tPLH tPHL tPZH tPZL tPHZ tPLZ tSK(O) Description Propagation Delay Data to Output Output Enable Time Output Disable Time Output Skew[17] Min. 1.5 1.5 1.5 Max. 4.8 6.2 5.6 0.5 CY74FCT163245C CY74FCT163H245C Min. 1.5 1.5 1.5 Max. 4.1 5.8 5.2 0.5 Unit ns ns ns ns Fig. No.[16] 1, 3 1, 7, 8 1, 7, 8 --
Notes: 11. This parameter is not directly testable, but is derived for use in Total Power Supply calculations. 12. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC+ICCDHNT+ICCD(f0/2 + f1N1) ICC = Quiescent Current with CMOS input levels ICC = Power Supply Current for a TTL HIGH input (VIN=3.4V) DH = Duty Cycle for TTL inputs HIGH NT = Number of TTL inputs at DH ICCD = Dynamic Current caused by an input transition pair (HLH or LHL) = Clock frequency for registered devices, otherwise zero f0 = Input signal frequency f1 N1 = Number of inputs changing at f1 All currents are in milliamps and all frequencies are in megahertz. 13. Values for these conditions are examples of the ICC formula. These limits are specified but not tested. 14. Minimum limits are specified but not tested on Propagation Delays. 15. For VCC =2.7, propagation delay, output enable and output disable times should be degraded by 20%. 16. See "Parameter Measurement Information" in the General Information section. 17. Skew between any two outputs of the same package switching in the same direction. This parameter is ensured by design.
Ordering Information CY74FCT163245
Speed (ns) 4.1 4.8 Ordering Code CY74FCT163245CPACT CY74FCT163245CPVC/PVCT CY74FCT163245APACT CY74FCT163245APVC/PVCT Package Name Z48 O48 Z48 O48 Package Type 48-Lead (240-Mil) TSSOP 48-Lead (300-Mil) SSOP 48-Lead (240-Mil) TSSOP 48-Lead (300-Mil) SSOP Industrial Operating Range Industrial
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CY74FCT163245 CY74FCT163H245
Ordering Information CY74FCT163H245
Speed (ns) 4.1 Ordering Code 74FCT163H245CPACT CY74FCT163H245CPVC 74FCT163H245CPVCT 4.8 CY74FCT163H245APVC 74FCT163H245APVCT Package Name Z48 O48 O48 O48 O48 Package Type 48-Lead (240-Mil) TSSOP 48-Lead (300-Mil) SSOP 48-Lead (300-Mil) SSOP 48-Lead (300-Mil) SSOP 48-Lead (300-Mil) SSOP Industrial Operating Range Industrial
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