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Details, datasheet, quote on part number:84010013A
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| Part: | 84010013A |
| Category: | Logic => Flip-Flops => D-Type (3-State) Flip-Flops |
| Description: | ti SN54ALS874B, Octal 4-Bit D-type Edge-triggered Flip-flops With 3-state Outputs |
| Company: | Texas Instruments, Inc. |
| Datasheet: | Download 84010013A datasheet File size : 146 kB |
| Request For quote: | Find where to buy 84010013A
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Datasheet text preview:
SN54ALS874B, SN74ALS874B, SN74ALS876A SN74AS874, SN74AS876 DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS
SDAS061C APRIL 1982 REVISED JANUARY 1995
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3-State Buffer-Type Outputs Drive Bus Lines Directly Bus-Structured Pinout Choice of True or Inverting Logic SN54ALS874B, SN74ALS874B, SN74AS874 Have True Outputs SN74ALS876A, SN74AS876 Have Inverting Outputs Asynchronous Clear Package Options Include Plastic Small-Outline (DW) Packages, Plastic (FN) and Ceramic (FK) Chip Carriers, and Standard Plastic (NT) and Ceramic (JT) 300-mil DIPs
SN54ALS874B . . . JT PACKAGE SN74ALS874B, SN74AS874 . . . DW OR NT PACKAGE (TOP VIEW)
1CLR 1OE 1D1 1D2 1D3 1D4 2D1 2D2 2D3 2D4 2OE GND
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
VCC 1CLK 1Q1 1Q2 1Q3 1Q4 2Q1 2Q2 2Q3 2Q4 2CLK 2CLR
description
These dual 4-bit D-type edge-triggered flip-flops feature 3-state outputs designed specifically as bus drivers. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The edge-triggered flip-flops enter data on the low-to-high transition of the clock (CLK) input. The SN54ALS874B, SN74ALS874B, and SN74AS874 have clear (CLR) inputs and noninverting Q outputs. The SN74ALS876A and SN74AS876 have preset (PRE) inputs and inverting Q outputs; taking PRE low causes the four Q or Q outputs to go low independently of the clock. The SN54ALS874B is characterized for operation over the full military temperature range of 55°C to 125°C. The SN74ALS874B, SN74ALS876A, SN74AS874, and SN74AS876 devices are characterized for operation from 0°C to 70°C.
SN54ALS874B . . . FK PACKAGE (TOP VIEW)
1D2 1D3 1D4 NC 2D1 2D2 2D3
5 6 7 8 9
4
1D1 1OE 1CLR NC VCC 1CLK 1Q1
3 2 1 28 27 26 25 24 23 22 21 20 10 19 11 12 13 14 15 16 17 18
1Q2 1Q3 1Q4 NC 2Q1 2Q2 2Q3
NC No internal connection SN74ALS876A, SN74AS876 . . . DW OR NT PACKAGE (TOP VIEW)
1PRE 1OE 1D1 1D2 1D3 1D4 2D1 2D2 2D3 2D4 2OE GND
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
2D4 2OE GND NC 2CLR 2CLK 2Q4
1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13
VCC 1CLK 1Q1 1Q2 1Q3 1Q4 2Q1 2Q2 2Q3 2Q4 2CLK 2PRE
Copyright © 1995, Texas Instruments Incorporated
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SN54ALS874B, SN74ALS874B, SN74ALS876A SN74AS874, SN74AS876 DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS
SDAS061C APRIL 1982 REVISED JANUARY 1995
Function Tables
SN54ALS874B, SN74ALS874B, SN74AS874 (each flip-flop) INPUTS OE L L L L H CLR L H H H X CLK X L X D X H L X X OUTPUT Q L H L Q0 Z
SN74ALS876A, SN74AS876 (each flip-flop) INPUTS OE L L L L H PRE L H H H X CLK X L X D X H L X X OUTPUT Q L L H Q0 Z
logic symbols
SN54ALS874B, SN74ALS874B, SN74AS874 1OE 1CLK 1CLR 1D1 1D2 1D3 1D4 2 23 1 3 4 5 6 R 1D 22 21 20 19 1Q1 1Q2 1Q3 1Q4 EN C1 1OE 1CLK 1PRE 1D1 1D2 1D3 1D4 2 23 1 3 4 5 6 S 1D 22 21 20 19 1Q1 1Q2 1Q3 1Q4 SN74ALS876A, SN74AS876 EN C1
2OE 2CLK 2CLR 2D1 2D2 2D3 2D4
11 14 13 7 8 9 10
EN C1 R 1D 18 17 16 15 2Q1 2Q2 2Q3 2Q4
2OE 2CLK 2PRE 2D1 2D2 2D3 2D4
11 14 13 7 8 9 10
EN C1 S 1D 18 17 16 15 2Q2 2Q3 2Q4 2Q1
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the DW, JT, and NT packages.
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN54ALS874B, SN74ALS874B, SN74ALS876A SN74AS874, SN74AS876 DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS
SDAS061C APRIL 1982 REVISED JANUARY 1995
logic diagrams (positive logic)
SN54ALS874B, SN74ALS874B, SN74AS874 (each quad flip-flop) OE OE SN74ALS876A, SN74AS876 (each quad flip-flop)
CLK
CLK
CLR R C1 D1 1D R C1 D2 1D R C1 D3 1D Q3 Q2 Q1
PRE S C1 D1 1D S C1 D2 1D S C1 D3 1D Q3 Q2 Q1
R C1 D4 1D Q4 D4
S C1 1D Q4
Pin numbers shown are for the DW, JT, and NT packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Operating free-air temperature range, TA: SN54ALS874B . . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C to 125°C SN74ALS874B, SN74ALS876A . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
3
SN54ALS874B, SN74ALS874B, SN74ALS876A SN74AS874, SN74AS876 DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS
SDAS061C APRIL 1982 REVISED JANUARY 1995
recommended operating conditions
SN54ALS874B MIN VCC VIH VIL IOH IOL fclock tw Supply voltage High-level input voltage Low-level input voltage High-level output current Low-level output current Clock frequency PRE or CLR low Pulse duration CLK high CLK low tsu th TA Setup time before CLK time before CLK Hold time, data after CLK Operating free-air temperature Data PRE or CLR inactive 0 15 20 20 15 15 4 55 125 4.5 2 0.7 1 12 25 0 10 16.5 16.5 15 10 0 0 70 ns ns °C ns NOM 5 MAX 5.5 SN74ALS874B SN74ALS876A MIN 4.5 2 0.8 2.6 24 30 NOM 5 MAX 5.5 V V V mA mA MHz UNIT
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER VIK VOH TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V to 5.5 V, VCC = 4 5 V 4.5 VCC = 4 5 V 4.5 VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, ALS874B ICC SN74ALS876A VCC = 5.5 V VCC = 5.5 V II = 18 mA IOH = 0.4 mA IOH = 1 mA IOH = 2.6 mA IOL = 12 mA IOL = 24 mA VO = 2.7 V VO = 0.4 V VI = 7 V VI = 2.7 V VI = 0.4 V VO = 2.25 V Outputs high Outputs low Outputs disabled Outputs high Outputs low 20 14 19 20 SN54ALS874B MIN VCC 2 2.4 TYP MAX 1.2 VCC 2 3.3 2.4 0.25 0.4 20 20 0.1 20 0.2 112 21 30 32 30 14 19 20 14 18 3.2 0.25 0.35 0.4 0.5 20 20 0.1 20 0.2 112 21 30 32 21 29 mA V µA µA mA µA mA mA V SN74ALS874B SN74ALS876A MIN TYP MAX 1.2 V UNIT
VOL IOZH IOZL II IIH IIL IO
Outputs disabled 20 31 All typical values are at VCC = 5 V, TA = 25°C. The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
4
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN54ALS874B, SN74ALS874B, SN74ALS876A SN74AS874, SN74AS876 DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS
SDAS061C APRIL 1982 REVISED JANUARY 1995
switching characteristics (see Figure 1)
VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500 , R2 = 500 , TA = MIN to MAX SN54ALS874B MIN fmax tPLH tPHL tPHL tPZH tPZL tPHZ CLK CLR OE Any Q Any Q Any Q 25 4 4 5 4 4 18 16 23 24 21 MAX SN74ALS874B MIN 30 4 4 5 4 4 2 3 14 14 17 18 18 10 12 MAX MHz ns ns ns ns
PARAMETER
FROM (INPUT)
TO (OUTPUT)
UNIT
2 15 OE Any Q tPLZ 3 22 For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
switching characteristics (see Figure 1)
VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500 , R2 = 500 , TA = MIN to MAX SN74ALS876A MIN fmax tPLH tPHL tPHL tPZH tPZL tPHZ 30 CLK PRE OE 4 Any Q Any Q Any Q 4 6 4 4 14 14 19 18 18 10 13 MAX MHz ns ns ns ns
PARAMETER
FROM (INPUT)
TO (OUTPUT)
UNIT
2 OE Any Q tPLZ 3 For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Operating free-air temperature range, TA: SN74AS874, SN74AS876 . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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