Digchip : Database on electronics components
 
Member, Distributor  
Log In
Email:
Password:


Part: 8401302CA

Category:
 Logic
   -> Transceivers
             -> Standard Transceivers

Description: ti SN54ALS243A, Quadruple Bus Transceivers With 3-State Outputs

Company: Texas Instruments, Inc.

Datasheet: Download 8401302CA datasheet     File size : 68 kB

Request For quote: Find where to buy 8401302CA



Datasheet text preview:
SN54ALS243A, SN74ALS243A QUADRUPLE BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SDAS069B ­ DECEMBER 1982 ­ REVISED DECEMBER 1994

· · ·

Two-Way Asynchronous Communication Between Data Buses pnp Inputs Reduce dc Loading Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs

SN54ALS243A . . . J PACKAGE SN74ALS243A . . . D OR N PACKAGE (TOP VIEW)

description
These quadruple bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing. These devices allow data transmission from the A bus to the B bus or from the B bus to the A bus depending upon the logic levels at the output-enable (OEBA and OEAB) inputs. The output-enable inputs can be used to disable the device so that the buses are effectively isolated. The dual-enable configuration gives the quadruple bus transceivers the capability to store data by simultaneously enabling OEBA and OEAB. Each output reinforces its input in this transceiver configuration. When both control inputs are enabled and all other data sources to the two sets of bus lines are at high impedance, both sets of bus lines (eight in all) retain their states. The 4-bit codes appearing on the two sets of buses are identical.

OEAB NC A1 A2 A3 A4 GND

1 2 3 4 5 6 7

14 13 12 11 10 9 8

VCC OEBA NC B1 B2 B3 B4

SN54ALS243A . . . FK PACKAGE (TOP VIEW)

A1 NC A2 NC A3

4 5 6 7 8

3 2 1 20 19 18 17 16 15 14 9 10 11 12 13

NC OEAB NC VCC OEBA NC NC B1 NC B2
NC ­ No internal connection FUNCTION A to B B to A Isolation Latch A and B (A = B)
Copyright © 1994, Texas Instruments Incorporated

The SN54ALS243A is characterized for operation over the full military temperature range of ­ 55°C to 125°C. The SN74ALS243A is characterized for operation from 0°C to 70°C.
FUNCTION TABLE INPUTS OEAB L H H L OEBA L H L H

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

POST OFFICE BOX 655303

· DALLAS, TEXAS 75265

A4 GND NC B4 B3

1

SN54ALS243A, SN74ALS243A QUADRUPLE BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SDAS069B ­ DECEMBER 1982 ­ REVISED DECEMBER 1994

logic symbol
OEBA OEAB A1 3 13 1 EN1 EN2 1 2 11 10 B1 B2

logic diagram (positive logic)
OEAB A1 1 3 13 11 OEBA B1

A2 A3

4 5

A2 9 8 B3 B4

4

10

B2

A4

6

A3

5

9

B3

This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, J, and N packages.

A4

6

8

B4

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI: All inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Operating free-air temperature range, TA: SN54ALS243A . . . . . . . . . . . . . . . . . . . . . . . . . . . ­ 55°C to 125°C SN74ALS243A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­ 65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

recommended operating conditions
SN54ALS243A MIN VCC VIH VIL IOH IOL TA Supply voltage High-level input voltage Low-level input voltage High-level output current Low-level output current Operating free-air temperature ­ 55 4.5 2 0.7 ­ 12 12 125 0 NOM 5 MAX 5.5 SN74ALS243A MIN 4.5 2 0.8 ­ 15 24 70 NOM 5 MAX 5.5 UNIT V V V mA mA °C

2

POST OFFICE BOX 655303

· DALLAS, TEXAS 75265

SN54ALS243A, SN74ALS243A QUADRUPLE BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SDAS069B ­ DECEMBER 1982 ­ REVISED DECEMBER 1994

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER VIK TEST CONDITIONS CONDITIONS VCC = 4.5 V, VCC = 4.5 V to 5.5 V, VCC = 4.5 V II = ­ 18 mA IOH = ­ 0.4 mA IOH = ­ 3 mA IOH = ­ 12 mA IOH = ­ 15 mA IOL = 12 mA IOL = 24 mA VI = 7 V VI = 5.5 V VI = 2 7 V 2.7 VI = 0 4 V 0.4 VO = 2.25 V Outputs high Outputs low Outputs disabled ­ 20 15 20 21 MIN SN54ALS243A TYP MAX ­ 1.2 VCC ­ 2 2.4 2 2 0.25 0.4 0.1 0.1 20 20 ­ 0.1 ­ 0.1 ­ 112 30 35 37 ­ 30 15 20 21 0.25 0.35 0.4 0.5 0.1 0.1 20 20 ­ 0.1 ­ 0.1 ­ 112 25 30 32 mA V mA µA mA mA 3.2 VCC ­ 2 2.4 3.2 MIN SN74ALS243A TYP MAX ­ 1.2 UNIT V

VOH

V

VOL II IIH IIL IO§ ICC Control inputs A or B ports Control inputs A or B ports Control inputs A or B ports

VCC = 4 5 V 4.5 VCC = 5 5 V 5.5 VCC = 5 5 V 5.5 V, VCC = 5 5 V 5.5 V, VCC = 5.5 V, VCC = 5.5 V

All typical values are at VCC = 5 V, TA = 25°C. For I/O ports, the parameters IIH and IIL include the off-state output current. § The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.

switching characteristics (see Figure 1)
VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500 , R2 = 500 , TA = MIN to MAX¶ SN54ALS243A MIN tPLH tPHL tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ tPLZ A or B or 4 B or A or B B A A 4 7 OEAB OEAB OEBA OEBA 7 2 3 7 7 2 3 MAX 15 15 25 25 16 27 25 25 16 27 SN74ALS243A MIN 4 4 7 7 2 3 7 7 2 3 MAX 11 11 20 20 14 22 20 20 14 22 ns ns ns ns ns

PARAMETER

FROM (INPUT)

TO (OUTPUT)

UNIT

¶ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

POST OFFICE BOX 655303

· DALLAS, TEXAS 75265

3

SN54ALS243A, SN74ALS243A QUADRUPLE BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SDAS069B ­ DECEMBER 1982 ­ REVISED DECEMBER 1994

PARAMETER MEASUREMENT INFORMATION SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
7V VCC S1 RL From Output Under Test CL (see Note A) RL Test Point R1 From Output Under Test CL (see Note A) Test Point From Output Under Test CL (see Note A) R2 Test Point RL = R1 = R2

LOAD CIRCUIT FOR BI-STATE TOTEM-POLE OUTPUTS

LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS

LOAD CIRCUIT FOR 3-STATE OUTPUTS

Timing Input tsu Data Input 1.3 V

3.5 V 1.3 V 0.3 V th 3.5 V 1.3 V 0.3 V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES

High-Level Pulse

3.5 V 1.3 V tw 1.3 V 0.3 V

Low-Level Pulse

3.5 V 1.3 V 1.3 V 0.3 V VOLTAGE WAVEFORMS PULSE DURATIONS

Output Control (low-level enabling) tPZL Waveform 1 S1 Closed (see Note B)

3.5 V 1.3 V 1.3 V 0.3 V tPLZ 1.3 V VOL 0.3 V VOH 1.3 V 0.3 V 3.5 V Input tPLH In-Phase Output 1.3 V 1.3 V 1.3 V 0.3 V tPHL VOH 1.3 V VOL tPLH VOH 1.3 V VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES 1.3 V VOL

[3.5 V

tPHZ tPZH Waveform 2 S1 Open (see Note B)

tPHL Out-of-Phase Output (see Note C)

[0 V

VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS

NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. When measuring propagation delay items of 3-state outputs, switch S1 is open. D. All input pulses have the following characteristics: PRR 1 MHz, tr = tf = 2 ns, duty cycle = 50%. E. The outputs are measured one at a time with one transition per measurement.

Figure 1. Load Circuits and Voltage Waveforms

4

POST OFFICE BOX 655303

· DALLAS, TEXAS 75265

IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI's publication of information regarding any third party's products or services does not constitute TI's approval, warranty or endorsement thereof.

Copyright © 1998, Texas Instruments Incorporated




Others parts begin by 84
84-1   84-2