|Category||Semiconductors => Space & High Reliability => Logic Products => Specialty Logic Products => Decoders/Encoders/Multiplexers|
|Part family||CD54HCT139 High Speed CMOS Logic Dual 2-to-4 Line Decoder/Demultiplexers|
|Description||High Speed CMOS Logic Dual 2-to-4 Line Decoder/Demultiplexers 16-CDIP -55 to 125|
|Company||Texas Instruments, Inc.|
|Datasheet||Download CD54HCT139 datasheet
|Cross ref.||Similar parts: SN74LS139NG, SN74LS139J, SN74LS139JB, SN74LS139JT, SN74LS139JTB, SN74LS139N, SN74LS139NB, SN74LS139NT, SN74LS139NTB, SN74LS139JD|
|ICC @ Nom Voltage(Max)(mA)||0.08|
|tpd @ Nom Voltage(Max)(ns)||45|
|F @ Nom Voltage(Max)(Mhz)||25|
|Operating Temperature Range(C)||-55 to 125|
|Pin nb||Package type||Ind std||JEDEC code||Package qty||Carrier||Device mark||Width (mm)||Length (mm)||Thick (mm)||Pitch (mm)|
|• SN54/74HCT CMOS Logic Family Applications and Restrictions
The TI SN54/74HCT family of CMOS devices is a subgroup of the SN74HC series with the HCT circuitry modified to meet the interfacing requirements of TTL outputs to high-speed CMOS inputs. The HCT devices can be driven by the TTL circuits directly without ad | Doc
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Data sheets, which usually give information on device behavior only under recommended operating conditions, may only partially answer engineering questions that arise during the development of systems using logic devices. However, information is frequently | Doc
|• CMOS Power Consumption and CPD Calculation (Rev. B)
Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result, CMOS devices are best known for low power consumpti | Doc
|• Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
Though low power consumption is a feature of CMOS devices, sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This docu | Doc
|Data sheet acquired from Harris Semiconductor SCHS148B
High-Speed CMOS Logic Dual 2-to-4 Line Decoder/Demultiplexer
or 2A0 and 2A1) cause one of the four normally high outputs to go low. If the enable input is high all four outputs remain high. For demultiplexer operation the enable input is the data input. The enable input also functions as a chip select when these devices are cascaded. This device is functionally the same as the CD4556B and is pin compatible with it. The outputs of these devices can drive 10 low power Schottky TTL equivalent loads. The HCT logic family is functionally as well as pin equivalent to the LS logic family.Features
Multifunction Capability - Binary of 4 Decoders to 4 Line Demultiplexer Active Low Mutually Exclusive Outputs Fanout (Over Temperature Range) - Standard Outputs. 10 LSTTL Loads - Bus Driver Outputs. 15 LSTTL Loads Wide Operating Temperature Range. to 125oC Balanced Propagation Delay and Transition Times Significant Power Reduction Compared to LSTTL Logic ICs HC Types to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30%of VCC at VCC = 5V HCT Types to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, 1µA at VOL, VOH Memory Decoding, Data Routing, Code Conversion[ /Title HCT13 9) /Subject (High Speed CMOS Logic Dual 2-to-4 Line Decod
PART NUMBER CD74HCT139E CD74HCT139M TEMP. RANGE (oC) to 125 PACKAGE 16 Ld CERDIP 16 Ld CERDIP 16 Ld PDIP 16 Ld SOIC 16 Ld CERDIP 16 Ld CERDIP 16 Ld PDIP 16 Ld SOICDescription
The 'HC139 and 'HCT139 devices contain two independent binary to one of four decoders each with a single active low enable input or 2E). Data on the select inputs (1A0 and
NOTES: 1. When ordering, use the entire part number. Add the suffix 96 to obtain the variant in the tape and reel. 2. Die is available which meets all electrical specifications. Please contact your local TI sales office or customer service for ordering information.
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. CopyrightNOTE: X = Don't Care, Logic 1 = High, Logic 0 = Low
DC Supply Voltage, VCC. 7V DC Input Diode Current, IIK For VI > VCC 0.5V.±20mA DC Output Diode Current, IOK For VO > VCC 0.5V.±20mA DC Output Source or Sink Current per Output Pin, IO For VO < VCC 0.5V.±25mA DC VCC or Ground Current, ICC or IGND.±50mA
Thermal Resistance (Typical, Note 3) JA (oC/W) PDIP Package. 90 SOIC Package. 115 Maximum Junction Temperature. 150oC Maximum Storage Temperature to 150oC Maximum Lead Temperature (Soldering 10s). 300oC (SOIC - Lead Tips Only)
Temperature Range (TA). to 125oC Supply Voltage Range, VCC to 6V HCT 5.5V DC Input or Output Voltage, VI, VO. 0V to VCC Input Rise and Fall Time 2V. 1000ns (Max) 4.5V. 500ns (Max) 6V. 400ns (Max)
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.NOTE: JA is measured with the component mounted on an evaluation PC board in free air.
TEST CONDITIONS PARAMETER HC TYPES High Level Input Voltage VIH 4.5 6 Low Level Input Voltage VIL 4.5 6 High Level Output Voltage CMOS Loads High Level Output Voltage TTL Loads Low Level Output Voltage CMOS Loads Low Level Output Voltage TTL Loads Input Leakage Current Quiescent Device Current II ICC VCC or GND VCC or GND VOL VIH or VIL VOH VIH or VIL µA SYMBOL VI (V) IO (mA) VCC (V) 25oC MIN TYP MAX TO 125oC MIN MAX MIN MAX UNITS
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