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Part: CD74HC4066PWR
Category:
Logic
-> Switches
-> Standard Bus Switches
Description: ti CD74HC4066, High Speed CMOS Logic Quad Bilateral Switches
Company: Texas Instruments, Inc.
Datasheet: Download CD74HC4066PWR datasheet File size : 312 kB
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Datasheet text preview:
CD54HC4066, CD74HC4066, CD74HCT4066
Data sheet acquired from Harris Semiconductor SCHS208D
February 1998 - Revised August 2003
High-Speed CMOS Logic Quad Bilateral Switch
Description
The 'HC4066 and CD74HCT4066 contain four independent digitally controlled analog switches that use silicon-gate CMOS technology to achieve operating speeds similar to LSTTL with the low power consumption of standard CMOS integrated circuits. These switches feature the characteristic linear "ON" resistance of the metal-gate CD4066B. Each switch is turned on by a high-level voltage on its control input.
Features
· Wide Analog-Input-Voltage Range . . . . . . . . . . 0V - 10V
[ /Title (CD74H C4066, CD74H CT4066 ) /Subject (HighSpeed CMOS Logic Quad
· Low "ON" Resistance - VCC = 4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 - VCC = 9V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 · Fast Switching and Propagation Delay Times · Low "OFF" Leakage Current · Wide Operating Temperature Range . . . -55oC to 125oC · HC Types - 2V to 10V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V and 10V · HCT Types - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il 1µA at VOL, VOH
Ordering Information
PART NUMBER CD54HC4066F3A CD74HC4066E CD74HC4066M CD74HC4066MT CD74HC4066M96 CD74HC4066PW CD74HC4066PWR CD74HC4066PWT CD74HCT4066E CD74HCT4066M CD74HCT4066MT CD74HCT4066M96 TEMP. RANGE (oC) -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 PACKAGE 14 Ld CERDIP 14 Ld PDIP 14 Ld SOIC 14 Ld SOIC 14 Ld SOIC 14 Ld TSSOP 14 Ld TSSOP 14 Ld TSSOP 14 Ld PDIP 14 Ld SOIC 14 Ld SOIC 14 Ld SOIC
NOTE: When ordering, use the entire par t number. The suffixes 96 and R denote tape and reel. The suffix T denotes a small-quantity reel of 250.
Pinout
CD54HC4066 (CERDIP) CD74HC4066 (PDIP, SOIC, TSSOP) CD74HCT4066 (PDIP, SOIC) TOP VIEW
1Y 1 1Z 2 2Z 3 2Y 4 2E 5 3E 6 GND 7 14 VCC 13 1E 12 4E 11 4Y 10 4Z 9 3Z 8 3Y
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright
© 2003, Texas Instruments Incorporated
1
CD54HC4066, CD74HC4066, CD74HCT4066 Functional Diagram
13 1E 2 5 2E 3 6 3E 9 12 4E 10 11 8 4 1 1Y 1Z 2Y 2Z 3Y 3Z 4Y 4Z
GND = 7 VCC = 14
TRUTH TABLE INPUT nE L H H= High Level L= Low Level
SWITCH Off On
Logic Diagram
nY
p p n n nZ
nE
2
CD54HC4066, CD74HC4066, CD74HCT4066
Absolute Maximum Ratings
DC Supply Voltage, VCC HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 10.5V DC Input Diode Current, IIK For VI VCC + 0.5V . . . . . . . . . . . . . . . . . . . . . .±20mA DC Switch Current, IO (Note 1) For -0.5V VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±20mA DC Output Source or Sink Current per Output Pin, IO For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±25mA DC VCC or Ground Current, ICC . . . . . . . . . . . . . . . . . . . . . . . . .±50mA
Thermal Information
Thermal Resistance (Typical, Note 2) JA E (PDIP) Package . . . . . . . . . . . . . . . . . . . . . . . . . . 80oC/W M (SOIC) Package. . . . . . . . . . . . . . . . . . . . . . . . . . 86oC/W PW (TSSOP) Package . . . . . . . . . . . . . . . . . . . . . . 113oC/W Maximum Junction Temperature (Hermetic Package or Die) . . . 175oC Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only)
Operating Conditions
Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC Supply Voltage Range, VCC HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 10V HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to VCC Input Rise and Fall Time 2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max) 4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max) 6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 1. In certain applications, the external load-resistor current may include both VCC and signal-line components. To avoid drawing VCC current when switch current flows into the transmission gate inputs, (terminals 1, 4, 8 and 11) the voltage drop across the bidirectional switch must not exceed 0.6V (calculated from RON values shown in the DC Electrical Specifications Table). No VCC current will flow through RLif the switch current flows into terminals 2, 3, 9 and 10. 2. The package thermal impedance is calculated in accordance with JESD 51-7.
DC Electrical Specifications
TEST CONDITIONS PARAMETER HC TYPES High Level Input Voltage VIH 2 4.5 9 Low Level Input Voltage VIL 2 4.5 9 Input Leakage Current (Any Control) Off-Switch Leakage Current IIL VCC or GND VIL 10 1.5 3.15 6.3 0.5 1.35 2.7 ±0.1 1.5 3.15 6.3 0.5 1.35 2.7 ±1 1.5 3.15 6.3 0.5 1.35 2.7 ±1 V V V V V V µA SYMBOL VI (V) VIS (V) VCC (V) MIN 25oC TYP MAX -40oC TO 85oC MIN MAX -55oC TO 125oC MIN MAX UNITS
IZ
VCC or GND
10
-
-
±0.1
-
±1
-
±1
µA
3
CD54HC4066, CD74HC4066, CD74HCT4066
DC Electrical Specifications (Continued)
TEST CONDITIONS PARAMETER "ON" Resistance IO = 1mA (Figure 1) SYMBOL RON VI (V) VCC VIS (V) VCC or GND VCC (V) 4.5 6 9 VCC to GND 4.5 6 9 "ON" Resistance Between Any Two Switches Quiescent Device Current HCT TYPES High Level Input Voltage Low Level Input Voltage Input Leakage Current (Any Control) Off-Switch Leakage Current "ON" Resistance IO = 1mA (Figure 1) VIH VIL IIL VCC or GND VIL VCC 4.5 to 5.5 4.5 to 5.5 5.5 2 0.8 ±0.1 2 0.8 ±1 2 0.8 ±1 V V µA RON VCC 4.5 6 9 ICC VCC or GND 6 10 MIN 25oC TYP 25 20 15 35 24 16 1 0.75 0.5 MAX 80 75 60 95 84 70 2 16 -40oC TO 85oC MIN MAX 106 94 78 118 105 88 20 160 -55oC TO 125oC MIN MAX 128 113 95 142 126 105 40 320 UNITS µA µA
IZ RON
VCC or GND VCC or GND VCC to GND
5.5 4.5 4.5 4.5
-
25 35 1
±0.1 80 95 -
-
±1 106 118 -
-
±1 128 142 -
µA
"ON" Resistance Between Any Two Switches Quiescent Device Current Additional Quiescent Device Current Per Input Pin: 1 Unit Load NOTE:
RON
VCC
-
ICC ICC (Note 3)
VCC or GND VCC - 2.1
-
5.5 4.5 to 5.5
-
100
2 360
-
20 450
-
40 490
µA µA
3. For dual-supply systems theoretical worst case (VI = 2.4V, VCC = 5.5V) specification is 1.8mA.
HCT Input Loading Table
INPUT All UNIT LOADS 1
NOTE: Unit Load is ICC limit specified in DC Electrical Specifications table, e.g., 360µA max at 25oC.
4
CD54HC4066, CD74HC4066, CD74HCT4066
Switching Specifications Input tr, tf = 6ns
PARAMETER HC TYPES Propagation Delay Time Switch In to Out tPLH, tPHL CL = 50pF 2 4.5 9 CL = 15pF Propagation Delay Time Switch Turn On Delay tPZH, tPZL CL = 50pF 5 2 4.5 9 CL = 15pF Propagation Delay Time Switch Turn Off Delay tPHZ, tPLZ CL = 50pF 5 2 4.5 9 CL = 15pF Input (Control) Capacitance Power Dissipation Capacitance (Notes 4, 5) HCT TYPES Propagation Delay Time Switch In to Out Propagation Delay Time Switch Turn On Delay Propagation Delay Time Switch Turn Off Delay Input (Control) Capacitance Power Dissipation Capacitance (Notes 4, 5) NOTES: 5. PD = CPD VCC2 fi + (CL + CS) VCC2 fo where fi = input frequency, fo = output frequency, CL = output load capacitance, CS = switch capacitance, VCC = supply voltage. 4. CPD is used to determine the dynamic power consumption, per package. tPLH, tPHL CL = 50pF CL = 15pF tPZH, tPZL CL = 50pF CL = 15pF tPHZ, tPLZ CL = 50pF CL = 15pF CI CPD 4.5 5 4.5 5 4.5 5 5 4 9 14 38 12 24 35 10 15 30 44 10 18 36 53 10 ns ns ns ns ns ns pF pF CI CPD 5 5 4 8 12 25 60 12 8 100 20 12 150 30 24 10 75 15 11 125 25 15 190 38 30 10 90 18 13 150 30 18 225 45 36 10 ns ns ns ns ns ns ns ns ns ns ns ns pF pF SYMBOL TEST CONDITIONS VCC (V) 25oC MIN TYP MAX -40oC TO 85oC -55oC TO 125oC MIN MAX MIN MAX UNITS
Analog Channel Specifications TA = 25oC
PARAMETER Switch Frequency Response Bandwidth at -3dB Figure 2 Cross Talk Between Any Two Switches Figure 3 Total Harmonic Distortion TEST CONDITIONS Figure 5, Notes 6, 7 VCC (V) 4.5 HC4066 200 CD74HCT4066 200 UNITS MHz
Figure 4, Notes 7, 8 Figure 6, 1kHz, VIS = 4VP-P Figure 6, 1kHz, VIS = 8VP-P
4.5 4.5
-72 0.022
-72 0.023
dB %
9
0.008
N/A
%
5
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