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Part: CY74FCT163827CPACT
Category:
Logic
-> Buffers/Drivers
-> Non-Inverting Buffers and Drivers
Description: ti CY74FCT163827, 20-Bit Buffers/drivers With 3-State Outputs
Company: Texas Instruments, Inc.
Datasheet: Download CY74FCT163827CPACT datasheet File size : 207 kB
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Datasheet text preview:
Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered.
CY74FCT163827
SCCS049 - March 1997 - Revised March 2000
20-Bit Buffer
Functional Description
The CY74FCT163827 is a 20-bit buffer/line driver that provides high-performance bus interface buffering for wide data/address paths or buses carrying parity. It can be used as a single 20-bit buffer or two 10-bit buffers. Each 10-bit buffer has a pair of NANDed OE for increased flexibility. The CY74FCT163827 has 24-mA balanced output drivers with current limiting resistors in the outputs. This reduces the need for external terminating resistors and provides for minimal undershoot and reduced ground bounce. The inputs and outputs were designed to be capable of being driven by 5.0V buses, allowing its use in mixed voltage systems as a translator. The outputs are also designed with a power-off disable feature enabling its use in applications requiring live inser tion.
Features
· Low power, pin-compatible replacement for LCX and LPT families · 5V tolerant inputs and outputs · 24 mA & 6 mA balanced drive outputs · Power-off disable outputs permits live insertion · Edge-rate control circuitry for reduced noise · FCT-C speed at 4.1 ns · Latch-up performance exceeds JEDEC standard no. 17 · Typical output skew 2000V
Logic Block Diagrams CY74FCT163827
Pin Configuration
SSOP/TSSOP Top View
1OE1 1OE2
1OE1 1Y1 1Y2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
1OE2 1A 1 1A 2
GND
1Y3 1A1 1Y1 1Y4
GND
1A 3 1A 4
VCC
1Y5 1Y6 1Y7
VCC
1A 5 1A 6 1A 7
TO 9 OTHER CHANNELS
FCT163827-1
GND 1Y8
1Y9 1Y10
GND
1A 8 1A 9 1 A 10 2A 1 2A 2 2A 3
2OE1 2OE2
2Y1 2Y2 2Y3
GND
2Y4 2Y5 2A1 2Y1 2Y6
GND
2A 4 2A 5 2A 6
VCC 2Y7
2Y8
VCC
2A 7 2A 8
GND TO 9 OTHER CHANNELS FCT163827-2
2Y9 2Y10 2OE1
GND
2A 9 2A10 2OE2
Copyright
© 2000, Texas Instruments Incorporated
CY74FCT163827
Pin Description
Name OE A Y Data Inputs Three-State Outputs Description Output Enable Inputs (Active LOW)
Maximum Ratings[2, 3]
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ........ -55°C to +125°C Ambient Temperature with Power Applied........... -55°C to +125°C Supply Voltage Range .... 0.5V to +4.6V DC Input Voltage ....... -0.5V to +7.0V Outputs A L H X X Y L H Z Z Range Commercial DC Output Voltage .... -0.5V to +7.0V DC Output Current (Maximum Sink Current/Pin) ... -60 to +120 mA Power Dissipation .......... 1.0W
Function Table[1]
Inputs OE1 L L H X OE2 L L X H
Operating Range
Ambient Temperature 40°C to +85°C VCC 2.7V to 3.6V
Electrical Characteristics Over the Operating Range VCC=2.7V to 3.6V
Parameter VIH VIL VH VIK IIH IIL IOZH IOZL IOS IOFF ICC ICC Description Input HIGH Voltage Input LOW Voltage Input Hysteresis[5] Input Clamp Diode Voltage Input HIGH Current Input LOW Current High Impedance Output Current (Three-State Output pins) High Impedance Output Current (Three-State Output pins) Shor t Circuit Current[6] Power-Off Disable Quiescent Power Supply Current Quiescent Power Supply Current (TTL inputs HIGH) VCC=Min., IIN=18 mA VCC=Max., VI=5.5 VCC=Max., VI=GND VCC=Max., VOUT=5.5V VCC=Max., VOUT=GND VCC=Max., VOUT=GND VCC=0V, VOUT4.5V VIN0.2V, VIN>VCC0.2V VIN=VCC0.6V[7] VCC=Max. VCC=Max. 0.1 2.0 60 135 100 0.7 1.2 ±1 ±1 ±1 ±1 240 ±100 10 30 Test Conditions All Inputs Min. 2.0 Typ.[4] Max. 5.5 0.8 Unit V V mV V µA µA µA µA mA µA µA µA
Note: 1. H = HIGH Voltage Level, L = LOW Voltage Level, X = Don't Care, Z = HIGH Impedance. 2. Operation beyond the limits set forth may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-air temperature range. 3. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground. 4. Typical values are at VCC=3.3V, TA = +25°C ambient. 5. This parameter is specified but not tested. 6. Not more than one output should be shor ted at a time. Duration of shor t should not exceed one second. The use of high-speed test apparatus and/or sample and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shor ting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last. 7. Per TTL driven input; all other inputs at VCC or GND.
2
CY74FCT163827
Electrical Characteristics For Balanced Drive Devices Over the Operating Range VCC=2.7V to 3.6V
Parameter IODL IODH VOH Description Output LOW Dynamic Current
[6]
Test Conditions VCC=3.3V, VIN=VIH or VIL, VOUT=1.5V VCC=3.3V, VIN=VIH or VIL, VOUT=1.5V VCC=Min., IOH= 0.1 mA VCC=Min., IOH= 8 mA VCC=3.0V, IOH= 24 mA
Min. 45 45 VCC0.2 2.4[8] 2.0
Typ.[4]
Max. 180 180
Unit mA mA V
Output HIGH Dynamic Current[6] Output HIGH Voltage
3.0 3.0 0.2 0.3 0.55
V V V
VOL
Output LOW Voltage
VCC=Min., IOL= 0.1mA VCC=Min., IOL= 24 mA
Capacitance[5](TA = +25°C, f = 1.0 MHz)
Parameter CIN COUT Description Input Capacitance Output Capacitance VIN = 0V VOUT = 0V Test Conditions Typ.[4] 4.5 5.5 Max. 6.0 8.0 Unit pF pF
Note: 8. VOH=VCC0.6V at rated current.
Power Supply Characteristics
Parameter ICCD Description Dynamic Power Supply Current[9] Total Power Supply Current[10] Test Conditions VCC=Max., One Input Toggling, VIN=VCC or 50% Duty Cycle, VIN=GND Outputs Open, OE=GND VCC=Max., f1=10 MHz, 50% VIN=VCC or Duty Cycle, Outputs Open, One VIN=GND Bit Toggling, OE=GND VIN=VCC0.6V or VIN=GND VIN=VCC or VCC=Max., f1=2.5 MHz, 50% Duty Cycle, Outputs Open, Six- VIN=GND teen Bits Toggling, OE=GND VIN=VCC0.6V or VIN=GND Typ.[4] 50 Max. 75 Unit µA/MHz
IC
0.5 0.5 2.0 2.0
0.8 0.8 3.0[11] 3.3[11]
mA mA mA mA
3
CY74FCT163827
Switching Characteristics Over the Operating Range VCC=3.0V to 3.6V[12,13]
CY74FCT163827A Parameter tPLH tPHL tPZH tPZL tPHZ tPLZ tSK(O) Description Propagation Delay Data to Output Output Enable Time Output Disable Time Output Skew[15] Min. 1.5 1.5 1.5 Max. 4.8 6.2 5.6 0.5 CY74FCT163827C Min. 1.5 1.5 1.5 Max. 4.1 5.8 5.2 0.5 Unit ns ns ns ns Fig. No.[14] 1, 3 1, 7, 8 1, 7, 8 --
Notes: 9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations. 10. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC+ICCDHNT+ICCD(f0/2 + f1N1) ICC = Quiescent Current with CMOS input levels ICC = Power Supply Current for a TTL HIGH input (VIN=3.4V) DH = Duty Cycle for TTL inputs HIGH NT = Number of TTL inputs at DH ICCD = Dynamic Current caused by an input transition pair (HLH or LHL) = Clock frequency for registered devices, otherwise zero f0 = Input signal frequency f1 N1 = Number of inputs changing at f1 All currents are in milliamps and all frequencies are in megahertz. 11. Values for these conditions are examples of the ICC formula. These limits are specified but not tested. 12. Minimum limits are guaranteed but not tested on Propagation Delays. 13. For VCC =2.7, propagation delay, output enable and output disable times should be degraded by 20%. 14. See "Parameter Measurement Information" in the General Information section. 15. Skew between any two outputs of the same package switching in the same direction. This parameter is ensured by design.
Ordering Information CY74FCT163827
Speed (ns) 4.1 4.8 Ordering Code CY74FCT163827CPACT CY74FCT163827CPVC/PVCT CY74FCT163827APVC/PVCT Package Name Z56 O56 O56 Package Type 56-Lead (240-Mil) TSSOP 56-Lead (300-Mil) SSOP 56-Lead (300-Mil) SSOP Commercial Operating Range Commercial
4
CY74FCT163827
Package Diagrams
56-Lead Shrunk Small Outline Package O56
56-Lead Thin Shrunk Small Outline Package Z56
5
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