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Part: CY74FCT163CTSOCT

Category:
 Logic
   -> Counters
     -> Binary Counters

Description: ti CY74FCT163T, Synchronous 4-Bit Binary Counter

Company: Texas Instruments, Inc.

Datasheet: Download CY74FCT163CTSOCT datasheet     File size : 207 kB

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Datasheet text preview:
CY54FCT163T, CY74FCT163T 4-BIT BINARY COUNTERS
SCCS015A ­ MAY 1994 ­ REVISED OCTOBER 2001

D D D D D D D D D

Function, Pinout, and Drive Compatible With FCT and F Logic Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics Ioff Supports Partial-Power-Down Mode Operation ESD Protection Exceeds JESD 22 ­ 2000-V Human-Body Model (A114-A) ­ 200-V Machine Model (A115-A) ­ 1000-V Charged-Device Model (C101) Matched Rise and Fall Times Fully Compatible With TTL Input and Output Logic Levels CY54FCT163T ­ 32-mA Output Sink Current ­ 12-mA Output Source Current CY74FCT163T ­ 64-mA Output Sink Current ­ 32-mA Output Source Current

CY74FCT163CT . . . Q OR SO PACKAGE (TOP VIEW)

SR CP P0 P1 P2 P3 CEP GND

1 2 3 4 5 6 7 8

16 15 14 13 12 11 10 9

VCC TC Q0 Q1 Q2 Q3 CET PE

CY54FCT163T . . . L PACKAGE (TOP VIEW)

P0 P1 NC P2 P3

4 5 6 7 8

3 2 1 20 19 18 17 16 15 14 9 10 11 12 13

SR NC VCC TC Q0 Q1 NC Q2 Q3

description

NC ­ No internal connection The 'FCT163T devices are high-speed synchronous modulo-16 binary counters. They are synchronously presettable for application in programmable dividers. These devices have two types of count-enable (CEP and CET) inputs, plus a terminal-count (TC) output for versatility in forming synchronous multistaged counters. The 'FCT163T devices have a synchronous-reset (SR) input that overrides counting and parallel loading, and allows the outputs to be reset simultaneously on the rising edge of the clock.

These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
PIN DESCRIPTION NAME CEP CET CP SR P PE Q TC DESCRIPTION Count-enable parallel input Count-enable trickle input Clock pulse input (active rising edge) Synchronous-reset input (active low) Parallel data inputs Parallel-enable input (active low) Flip-flop outputs Terminal-count output

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2001, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

POST OFFICE BOX 655303

· DALLAS, TEXAS 75265

CEP GND NC PE CET

CP

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CY54FCT163T, CY74FCT163T 4-BIT BINARY COUNTERS
SCCS015A ­ MAY 1994 ­ REVISED OCTOBER 2001

ORDERING INFORMATION
TA PACKAGE QSOP ­ Q ­40°C to 85°C SOIC ­ SO SO Tape and reel Tube Tape and reel SPEED (ns) 5.8 5.8 5.8 ORDERABLE PART NUMBER CY74FCT163CTQCT CY74FCT163CTSOC CY74FCT163CTSOCT TOP-SIDE MARKING FT163-3 FCT163C

­55°C to 125°C LCC ­ L Tube 11.5 CY54FCT163TLMB Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE INPUTS SR L H H H H PE X L H H H CET X X H L X CEP X X H X L ACTION ON THE RISING RISING CLOCK EDGE(S) Reset (clear) Load (Pn Qn) Count (incremental) No change (hold) No change (hold)

H = High logic level, L = Low logic level, X = Don't care

2

POST OFFICE BOX 655303

· DALLAS, TEXAS 75265

CY54FCT163T, CY74FCT163T 4-BIT BINARY COUNTERS
SCCS015A ­ MAY 1994 ­ REVISED OCTOBER 2001

logic diagram (positive logic)
PE CET CEP 9 10 7 15

TC

CP SR

2 1

D CP P0 3 D Q 14 Q0

D CP P1 4 D Q 13 Q1

D CP P2 5 D Q 12 Q2

D CP P3 6 D Q 11 Q3

POST OFFICE BOX 655303

· DALLAS, TEXAS 75265

3

CY54FCT163T, CY74FCT163T 4-BIT BINARY COUNTERS
SCCS015A ­ MAY 1994 ­ REVISED OCTOBER 2001

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range to ground potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­0.5 V to 7 V DC input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­0.5 V to 7 V DC output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­0.5 V to 7 V DC output current (maximum sink current/pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 mA Package thermal impedance, JA (see Note 1): Q package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90°C/W SO package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57°C/W Ambient temperature range with power applied, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­65°C to 135°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.

recommended operating conditions (see Note 2)
CY54FCT163T MIN VCC VIH VIL IOH IOL TA Supply voltage High-level input voltage Low-level input voltage High-level output current Low-level output current Operating free-air temperature ­55 4.5 2 0.8 ­12 32 125 ­40 NOM 5 MAX 5.5 CY74FCT163T MIN 4.75 2 0.8 ­32 64 85 NOM 5 MAX 5.25 UNIT V V V mA mA °C

NOTE 2: All unused inputs of the device must be held at VCC or GND to ensure proper device operation.

4

POST OFFICE BOX 655303

· DALLAS, TEXAS 75265

CY54FCT163T, CY74FCT163T 4-BIT BINARY COUNTERS
SCCS015A ­ MAY 1994 ­ REVISED OCTOBER 2001

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER VIK VCC = 4.5 V, VCC = 4.75 V, VCC = 4.5 V, VOH VCC = 4 75 V 4.75 VCC = 4.5 V, VCC = 4.75 V, All inputs VCC = 5.5 V, VCC = 5.25 V, VCC = 5.5 V, VCC = 5.25 V, VCC = 5.5 V, VCC = 5.25 V, VCC = 5.5 V, VCC = 5.25 V, VCC = 0 V, VCC = 5.5 V, VCC = 5.25 V, VIN = VCC VIN = VCC VIN = 2.7 V VIN = 2.7 V VIN = 0.5 V VIN = 0.5 V VOUT = 0 V VOUT = 0 V VOUT = 4.5 V 0.1 0.2 ­60 ­120 TEST CONDITIONS CONDITIONS IIN = ­18 mA IIN = ­18 mA IOH = ­12 mA IOH = ­32 mA IOH = ­15 mA IOL = 32 mA IOL = 64 mA 0.2 5 5 ±1 ±1 ±1 ±1 ­225 ­60 ±1 0.2 0.1 2 0.2 2 0.2 ­120 ­225 ±1 2.4 MIN CY54FCT163T TYP MAX ­0.7 3.3 2 2.4 0.3 0.55 0.3 0.2 0.55 3.3 V V µA µA µA mA µA mA mA V ­1.2 ­0.7 ­1.2 MIN CY74FCT163T TYP MAX UNIT V

VOL Vhys II IIH IIL IOS Ioff ICC ICC

VIN 0.2 V, VIN VCC ­ 0.2 V VIN 0.2 V, VIN VCC ­ 0.2 V §, f1 = 0, Outputs open VCC = 5.5 V, VIN = 3.4 V VCC = 5.25 V, VIN = 3.4 V§, f1 = 0, Outputs open VCC = 5.5 V, Load mode, Outputs open, One bit switching at 50% duty cycle, CEP = CET = PE = GND, SR = VCC, VIN 0.2 V or VIN VCC ­ 0.2 V VCC = 5.25 V, Load mode, Outputs open, One bit switching at 50% duty cycle, CEP = CET = PE = GND, SR = VCC, VIN 0.2 V or VIN VCC ­ 0.2 V

0.06

0.12 mA/ MHz 0.06 0.12

ICCD¶

Typical values are at VCC = 5 V, TA = 25°C. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample-and-hold techniques are preferable to minimize internal chip heating and more accurately reflect operational values. Otherwise, prolonged shorting of a high output can raise the chip temperature well above normal and cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last. § Per TTL-driven input (VIN = 3.4 V); all other inputs at VCC or GND ¶ This parameter is derived for use in total power-supply calculations.

POST OFFICE BOX 655303

· DALLAS, TEXAS 75265

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