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Details, datasheet, quote on part number:CY74FCT2373TSOIC
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Datasheet text preview:
1CY74FCT2573T
Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered.
CY74FCT2373T CY74FCT2573T
SCCS039 - September 1994 - Revised March 2000
8-Bit Latches
Functional Description
The FCT2373T and FCT2573T are 8-bit, high-speed CMOS TTL-compatible buffered latches with three-state outputs that are ideal for driving high-capacitance loads, such as memor y and address buffers. On-chip 25 termination resistors have been added to the outputs to reduce system noise caused by reflections. FCT2373T can be used to replace FCT373T, and FCT2573T to replace FCT573T to reduce noise in an existing design. When latch enable (LE) is HIGH, the flip-flops appear transparent to the data. Data that meets the required set-up times are latched when LE transitions from HIGH to LOW. Data appears on the bus when the output enable (OE) is LOW. When output enable is HIGH, the bus output is in the high impedance state. In this mode, data can still be entered into the latches. The outputs are designed with a power-off disable feature to allow for live insertion of boards.
Features
· Function and pinout compatible with the fastest bipolar logic · 25 output series resistors to reduce transmission line refelection noise · FCT-C speed at 4.7 ns max. · Reduced VOH (typically=3.3V) versions of equivalent FCT functions · Edge-rate control circuitry for significantly improved noise characteristics · Power-off disable feature · Matched rise and fall times · ESD > 2000V · Fully compatible with TTL input and output logic levels · Sink current 12 mA Source current 15 mA · Extended commercial temp. range of 40°C to +85°C
Logic Symbol
Pin Configurations
SOIC/QSOP Top View
D0 LE OE O0
D1
D2
D3
D4
D5
D6
D7
OE O0 D0
1 2 3 4 5
20 19 18 17
VCC O7 D7 D6 O6 O5 D5 D4 O4 LE FCT2373T-4
O1
O2
O3
O4
O5
O6
O7
D1 O1 O2
FCT2373T-1
D2 D3 O3 GND
16 6 FCT2373T15 14 7 8 9 10 13 12 11
Logic Block Diagram
D0 LE CP D Q CP D Q CP D Q CP D Q CP D Q CP D Q CP D Q CP D Q D1 D2 D3 D4 D5 D6 D7 OE D0 D1 D2 D3 D4 OE D5 D6 D7 O0 O1 O2 O3 O4 O5 O6 O7 FCT2373T-2 GND
SOIC/QSOP Top View
1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC O0 O1 O2 O3 O4 O5 O6 O7 LE
FCT2373T-6
Copyright
© 2000, Texas Instruments Incorporated
CY74FCT2373T CY74FCT2573T
Function Table[1]
Inputs OE L L L H LE H H L X D H L X X Outputs O H L Q0 Z Supply Voltage to Ground Potential ...... 0.5V to +7.0V DC Input Voltage .......... 0.5V to +7.0V DC Output Voltage........ 0.5V to +7.0V DC Output Current (Maximum Sink Current/Pin) ...... 120 mA Power Dissipation .......... 0.5W Static Discharge Voltage...........>2001V (per MIL-STD-883, Method 3015)
Maximum Ratings[2, 3]
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ......... 65°C to +150°C Ambient Temperature with Power Applied ............ 65°C to +135°C
Operating Range
Range Commercial Ambient Temperature 40°C to +85°C VCC 5V ± 5%
Electrical Characteristics Over the Operating Range
Parameter VOH VOL ROUT VIH VIL VH VIK II IIH IIL IOZH IOZL IOS IOFF Description Output HIGH Voltage Output LOW Voltage Output Resistance Input HIGH Voltage Input LOW Voltage Hysteresis[6] Input Clamp Diode Voltage Input HIGH Current Input HIGH Current Input LOW Current Off State HIGH-Level Output Current Off State LOW-Level Output Current Output Short Circuit Current[7] Power-Off Disable All inputs VCC=Min., IIN= 18 mA VCC=Max., VIN=VCC VCC=Max., VIN=2.7V VCC=Max., VIN=0.5V VCC=Max., VOUT=2.7V VCC=Max., VOUT=0.5V VCC=Max., VOUT=0.0V VCC=0V, VOUT=4.5V 60 120 0.2 0.7 1.2 5 ±1 ±1 10 10 225 ±1 Test Conditions VCC=Min., IOH= 15 mA VCC=Min., IOL=12 mA VCC=Min., IOL=12 mA 20 2.0 0.8 Min. 2.4 Typ.[5] 3.3 0.3 28 0.55 40 Max. Unit V V V V V V µA µA µA µA µA mA µA
Notes: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care Z = HIGH Impedance Qn = Previous state of flip flops (Qn1) 2. Unless otherwise noted, these limits are over the operating free-air temperature range. 3. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground. 4. TA is the "instant on" case temperature. 5. Typical values are at VCC=5.0V, TA=+25°C ambient. 6. This parameter is specified but not tested. 7. Not more than one output should be shor ted at a time. Duration of shor t should not exceed one second. The use of high-speed test apparatus and/or sample and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last.
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CY74FCT2373T CY74FCT2573T
Capacitance[6]
Parameter CIN COUT Input Capacitance Output Capacitance Description Typ.[5] 6 8 Max. 10 12 Unit pF pF
Power Supply Characteristics
Parameter ICC ICC ICCD Description Quiescent Power Supply Current Quiescent Power Supply Current (TTL inputs) Dynamic Power Supply Current[9] Total Power Supply Current[10] Test Conditions VCC=Max., VIN 0.2V, VIN VCC0.2V VCC=Max., VIN=3.4V,[8] f1=0, Outputs Open VCC=Max., One Input Toggling, 50% Duty Cycle, Outputs Open, OE=GND, VIN 0.2V or VIN VCC0.2V VCC=Max., 50% Duty Cycle, Outputs Open, One Bit Toggling at f1=10 MHz, OE=GND, LE=VCC, VIN 0.2V or VIN VCC0.2V VCC=Max., 50% Duty Cycle, Outputs Open, One Bit Toggling at f1=10 MHz, OE=GND, LE=VCC,VIN=3.4V or VIN=GND VCC=Max., 50% Duty Cycle, Outputs Open, Eight Bits Toggling at f1=2.5 MHz, OE=GND, LE=VCC, VIN 0.2V or VIN VCC0.2V VCC=Max., 50% Duty Cycle, Outputs Open, Eight Bits Toggling at f1=2.5 MHz, OE=GND, LE=VCC, VIN=3.4V or VIN=GND
Notes: 8. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND. 9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations. = IQUIESCENT + IINPUTS + IDYNAMIC 10. IC IC = ICC+ICCDHNT+ICCD(f0/2 + f1N1) ICC = Quiescent Current with CMOS input levels ICC = Power Supply Current for a TTL HIGH input (VIN=3.4V) DH = Duty Cycle for TTL inputs HIGH = Number of TTL inputs at DH NT ICCD = Dynamic Current caused by an input transition pair (HLH or LHL) = Clock frequency for registered devices, otherwise zero f0 = Input signal frequency f1 = Number of inputs changing at f1 N1 All currents are in milliamps and all frequencies are in megahertz. 11. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.
Typ.[5] 0.1 0.5 0.06
Max. 0.2 2.0 0.12
Unit mA mA mA/ MHz mA
IC
0.7
1.4
1.0
2.4
mA
1.3
2.6[11]
mA
3.3
10.6[11]
mA
3
CY74FCT2373T CY74FCT2573T
Switching Characteristics Over the Operating Range[12]
CY74FCT2373T CY74FCT2573T Parameter tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tS tH tW Description Propagation Delay D to O Propagation Delay LE to O Output Enable Time Output Disable Time Set-Up Time, HIGH to LOW D to LE Hold Time, HIGH to LOW D to LE LE Pulse Width HIGH Min. 1.5 2.0 1.5 1.5 2.0 1.5 6.0 Max. 8.0 13.0 11.0 7.0 CY74FCT2373AT CY74FCT2573AT Min. 1.5 2.0 1.5 1.5 2.0 1.5 5.0 Max. 5.2 8.5 6.5 5.5 CY74FCT2373CT CY74FCT2573CT Min. 1.5 2.0 1.5 1.5 2.0 1.5 5.0 Max. 4.2 5.5 5.5 5.0 Unit ns ns ns ns ns ns ns Fig. No.[13] 1, 3 1, 5 1, 7, 8 1, 7, 8 9 9 5
12. Minimum limits are specified but not tested on Propagation Delays. 13. See "Parameter Measurement Information" in the General Information section.
Ordering Information
Speed (ns) 4.2 5.2 8.0 Ordering Code CY74FCT2373CTQCT CY74FCT2373CTSOC/SOCT CY74FCT2373ATQCT CY74FCT2373ATSOC/SOCT CY74FCT2373TQCT Package Name Q5 S5 Q5 S5 Q5 Package Type 20-Lead (150-Mil) QSOP 20-Lead (300-Mil) Molded SOIC 20-Lead (150-Mil) QSOP 20-Lead (300-Mil) Molded SOIC 20-Lead (150-Mil) QSOP Commercial Commercial Operating Range Commercial
Ordering Information
Speed (ns) 4.2 5.2 8.0 Ordering Code CY74FCT2573CTQCT CY74FCT2573CTSOC/SOCT CY74FCT2573ATQCT CY74FCT2573TSOC/SOCT Package Name Q5 S5 Q5 S5 Package Type 20-Lead (150-Mil) QSOP 20-Lead (300-Mil) Molded SOIC 20-Lead (150-Mil) QSOP 20-Lead (300-Mil) Molded SOIC Commercial Commercial Operating Range Commercial
Document #: 3800338B
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CY74FCT2373T CY74FCT2573T
Package Diagrams
20-Lead Quarter Size Outline Q5
20-Lead (300-Mil) Molded SOIC S5
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