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Part: CY74FCT841ATSOC
Category:
Logic
-> Latches
-> D-Type (3-State) Latches
Description: ti CY74FCT841T, 10-Bit Bus-interface D-type Latches With 3-State Outputs
Company: Texas Instruments, Inc.
Datasheet: Download CY74FCT841ATSOC datasheet File size : 207 kB
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Datasheet text preview:
CY54FCT841T, CY74FCT841T 10-BIT LATCHES WITH 3-STATE OUTPUTS
SCCS035A SEPTEMBER 1994 REVISED OCTOBER 2001
D D D D D D D D D D D D
Function, Pinout, and Drive Compatible With FCT, F, and AM29841 Logic Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics Ioff Supports Partial-Power-Down Mode Operation Matched Rise and Fall Times ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101) Fully Compatible With TTL Input and Output Logic Levels High-Speed Parallel Latches Buffered Common Latch-Enable Input 3-State Outputs CY54FCT841T 32-mA Output Sink Current 12-mA Output Source Current CY74FCT841T 64-mA Output Sink Current 32-mA Output Source Current
CY54FCT841T . . . D PACKAGE CY74FCT841T . . . P, Q, OR SO PACKAGE (TOP VIEW)
OE D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 GND
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
VCC Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 Y9 LE
description
The 'FCT841T bus-interface latches are designed to eliminate additional packages required to buffer existing latches and provide additional data width for wider address/data paths or buses carrying parity. The 'FCT841T devices are buffered 10-bit-wide versions of the FCT373 function. The 'FCT841T devices' high-performance interface is designed for high-capacitance-load drive capability, while providing low-capacitance bus loading at both inputs and outputs. Outputs are designed for low-capacitance bus loading in the high-impedance state. These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
PIN DESCRIPTION NAME D LE Y OE I/O I I O I Latch data inputs Latch-enable input. The latches are transparent when LE is high. Input data is latched on the high-to-low transition. 3-state latch outputs Output-enable control. When OE is low, the outputs are enabled. When OE is high, the outputs are in the high-impedance (off) state. DESCRIPTION
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2001, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
1
CY54FCT841T, CY74FCT841T 10-BIT LATCHES WITH 3-STATE OUTPUTS
SCCS035A SEPTEMBER 1994 REVISED OCTOBER 2001
ORDERING INFORMATION
TA PACKAGE QSOP Q SOIC SO SO 40°C to 85°C to 85°C DIP P SOIC SO SO Tape and reel Tube Tape and reel Tube Tube Tape and reel SPEED (ns) 5.5 5.5 5.5 6.5 9 9 ORDERABLE PART NUMBER CY74FCT841CTQCT CY74FCT841CTSOC CY74FCT841CTSOCT CY74FCT841BTPC CY74FCT841ATSOC CY74FCT841ATSOCT TOP-SIDE MARKING FCT841C FCT841C CY74FCT841BTPC FCT841A
55°C to 125°C CDIP D Tube 10 CY54FCT841ATDMB Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE INPUTS OE H H H H L L L LE X H H L H H L D X L H X L H X INTERNAL OUTPUTS O X L H NC L H NC Y Z Z Z Z L H NC Latched (Z) Transparent Latched Z FUNCTION
H = High logic level, L = Low logic level, X = Don't care, NC = No change, Z = High-impedance state
logic diagram (positive logic)
OE 1
LE
13 LE 2 23 Q Y0
D0
D
To Nine Other Channels
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
CY54FCT841T, CY74FCT841T 10-BIT LATCHES WITH 3-STATE OUTPUTS
SCCS035A SEPTEMBER 1994 REVISED OCTOBER 2001
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range to ground potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V DC input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V DC output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V DC output current (maximum sink current/pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 mA Package thermal impedance, JA (see Note 1): P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W (see Note 2): Q package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61°C/W (see Note 2): SO package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46°C/W Ambient temperature range with power applied, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 135°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The package thermal impedance is calculated in accordance with JESD 51-3. 2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
CY54FCT841T MIN VCC VIH VIL IOH IOL TA Supply voltage High-level input voltage Low-level input voltage High-level output current Low-level output current Operating free-air temperature 55 4.5 2 0.8 12 32 125 40 NOM 5 MAX 5.5 CY74FCT841T MIN 4.75 2 0.8 32 64 85 NOM 5 MAX 5.25 UNIT V V V mA mA °C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
3
CY54FCT841T, CY74FCT841T 10-BIT LATCHES WITH 3-STATE OUTPUTS
SCCS035A SEPTEMBER 1994 REVISED OCTOBER 2001
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER VCC = 4.5 V, VCC = 4.75 V, VCC = 4.5 V, VOH VCC = 4 75 V 4.75 VCC = 4.5 V, VCC = 4.75 V, All inputs VCC = 5.5 V, VCC = 5.25 V, VCC = 5.5 V, VCC = 5.25 V, VCC = 5.5 V, VCC = 5.25 V, VCC = 5.5 V, VCC = 5.25 V, VCC = 5.5 V, VCC = 5.25 V, VCC = 5.5 V, VCC = 5.25 V, VCC = 0 V, VCC = 5.5 V, VCC = 5.25 V, VIN = VCC VIN = VCC VIN = 2.7 V VIN = 2.7 V VIN = 0.5 V VIN = 0.5 V VOUT = 2.7 V VOUT = 2.7 V VOUT = 0.5 V VOUT = 0.5 V VOUT = 0 V VOUT = 0 V VOUT = 4.5 V 0.1 0.5 ±1 0.2 0.1 2 0.5 0.06 0.12 mA/ MHz 0.06 0.12 2 0.2 60 120 10 10 225 60 120 225 ±1 10 10 ±1 ±1 ±1 ±1 TEST CONDITIONS CONDITIONS IIN = 18 mA IIN = 18 mA IOH = 12 mA IOH = 32 mA IOH = 15 mA IOL = 32 mA IOL = 64 mA 0.2 5 5 0.3 0.55 0.3 0.2 0.55 2.4 3.3 2 2.4 3.3 V V µA µA µA µA µA mA µA mA mA V MIN CY54FCT841T TYP MAX 0.7 1.2 0.7 1.2 MIN CY74FCT841T TYP MAX UNIT
VIK
V
VOL Vhys II IIH IIL IOZH IOZL IOS Ioff ICC ICC
VIN 0.2 V, VIN VCC 0.2 V VIN 0.2 V, VIN VCC 0.2 V §, f1 = 0, Outputs open VCC = 5.5 V, VIN = 3.4 V VCC = 5.25 V, VIN = 3.4 V§, f1 = 0, Outputs open VCC = 5.5 V, One input switching at 50% duty cycle, Outputs open, OE = GND, LE = VCC, VIN 0.2 V or VIN VCC 0.2 V VCC = 5.25 V, One input switching at 50% duty cycle, Outputs open, OE = GND, LE = VCC, VIN 0.2 V or VIN VCC 0.2 V
ICCD¶
Typical values are at VCC = 5 V, TA = 25°C. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample-and-hold techniques are preferable to minimize internal chip heating and more accurately reflect operational values. Otherwise, prolonged shorting of a high output can raise the chip temperature well above normal and cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last. § Per TTL-driven input (VIN = 3.4 V); all other inputs at VCC or GND ¶ This parameter is derived for use in total power-supply calculations.
4
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
CY54FCT841T, CY74FCT841T 10-BIT LATCHES WITH 3-STATE OUTPUTS
SCCS035A SEPTEMBER 1994 REVISED OCTOBER 2001
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) (continued)
PARAMETER TEST CONDITIONS CONDITIONS One bit switching at f1 = 10 MHz at 50% duty cycle 10 bits switching at f1 = 2.5 MHz at 50% duty cycle One bit switching at f1 = 10 MHz at 50% duty cycle 10 bits switching at f1 = 2.5 MHz at 50% duty cycle VIN 0.2 V or VIN VCC 0.2 V VIN = 3.4 V or GND VIN 0.2 V or VIN VCC 0.2 V VIN = 3.4 V or GND VIN 0.2 V or VIN VCC 0.2 V VIN = 3.4 V or GND VIN 0.2 V or VIN VCC 0.2 V VIN = 3.4 V or GND 5 9 10 12 MIN CY54FCT841T TYP MAX 0.7 1 1 4.1 1.4 2.4 3.2|| 13.2|| 0.7 1 1 4.1 5 9 1.4 2.4 3.2|| 13.2|| 10 12 pF pF mA MIN CY74FCT841T TYP MAX UNIT
VCC = 5 5 V 5.5 V, Outputs open, , OE = GND, LE = VCC IC# VCC = 5 25 V 5.25 V, Outputs open, , OE = GND, LE = VCC Ci Co
Typical values are at VCC = 5 V, TA = 25°C. # IC = ICC + ICC × DH × NT + ICCD (f0/2 + f1 × N1) Where: IC = Total supply current ICC = Power-supply current with CMOS input levels ICC = Power-supply current for a TTL high input (VIN = 3.4 V) DH = Duty cycle for TTL inputs high NT = Number of TTL inputs at DH ICCD = Dynamic current caused by an input transition pair (HLH or LHL) f0 = Clock frequency for registered devices, otherwise zero f1 = Input signal frequency N1 = Number of inputs changing at f1 All currents are in milliamperes and all frequencies are in megahertz. || Values for these conditions are examples of the ICC formula.
timing requirements over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)
CY54FCT841AT MIN tw tsu th Pulse duration, LE high Setup time, data before LE Hold time, data after LE 5 2.5 3 MAX CY74FCT841AT MIN 4 2.5 2.5 MAX CY74FCT841BT MIN 4 2.5 2.5 MAX CY74FCT841CT MIN 4 2.5 2.5 MAX UNIT ns ns ns
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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