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Details, datasheet, quote on part number:DAC7615E
 
 
Part:DAC7615E
Category:Data Conversion => DAC (Digital to Analog Converters)
Description:ti DAC7615, Quad, Serial Input, 12-Bit, Voltage Output Digital-to-analog Converter
Company:Texas Instruments, Inc.
Datasheet:Download DAC7615E datasheet   File size : 328 kB
Request For quote:  Find where to buy DAC7615E
 



Datasheet text preview:
®
DAC

DAC

761

5

DAC7615

761

5

Quad, Serial Input, 12-Bit, Voltage Output DIGITAL-TO-ANALOG CONVERTER
FEATURES
q LOW POWER: 20mW q UNIPOLAR OR BIPOLAR OPERATION q SETTLING TIME: 10µs to 0.012% q 12-BIT LINEARITY AND MONOTONICITY: ­40°C to +85°C q DOUBLE-BUFFERED DATA INPUTS q SMALL 20-LEAD SSOP PACKAGE

APPLICATIONS
q PROCESS CONTROL q ATE PIN ELECTRONICS q CLOSED-LOOP SERVO-CONTROL q MOTOR CONTROL q DATA ACQUISITION SYSTEMS q DAC-PER-PIN PROGRAMMERS

DESCRIPTION
The DAC7615 is a quad, serial input, 12-bit, voltage output digital-to-analog converter (DAC) with guaranteed 12-bit monotonic performance over the ­40°C to +85°C temperature range. An asynchronous reset clears all registers to either mid-scale (800H) or zeroscale (000H), selectable via the RESETSEL pin. The individual DAC inputs are double buffered to allow
GND

for simultaneous update of all DAC outputs. The device can be powered from a single +5V supply or from dual +5V and ­5V supplies. Low power and small size makes the DAC7615 ideal for automatic test equipment, DAC-per-pin programmers, data acquisition systems, and closed-loop servocontrol. The device is available in 16-pin plastic DIP, 16-lead SOIC, and 20-lead SSOP packages and is guaranteed over the ­40°C to +85°C temperature range.
VDD VREFH

Input Register A SDI

DAC Register A

DAC A VOUTA

Serial-toParallel Shift Register

Input Register B 12

DAC Register B

DAC B VOUTB

Input Register C

DAC Register C

DAC C VOUTC

CLK CS
DAC Select

Input Register D

DAC Register D

DAC D VOUTD

LOADREG

RESETSEL RESET

LOADDACS

VREFL

VSS

International Airport Industrial Park · Mailing Address: PO Box 11400, Tucson, AZ 85734 · Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 · Tel: (520) 746-1111 · Twx: 910-952-1111 Internet: http://www.burr-brown.com/ · FAXLine: (800) 548-6133 (US/Canada Only) · Cable: BBRCORP · Telex: 066-6491 · FAX: (520) 889-1510 · Immediate Product Info: (800) 548-6132

© 1998 Burr-Brown Corporation

PDS-1443C

Printed in U.S.A. November, 1998

SBAS091

SPECIFICATIONS
At TA = ­40°C to +85°C, VDD = +5V, VSS = ­5V, VREFH = +2.5V, and VREFL = ­2.5V, unless otherwise noted. DAC7615E, P, U PARAMETER ACCURACY Linearity Error(1) Linearity Matching(3) Differential Linearity Error Monotonicity Zero-Scale Error Zero-Scale Drift Zero-Scale Matching(3) Full-Scale Error Full-Scale Matching(3) Zero-Scale Error Zero-Scale Drift Zero-Scale Matching(3) Full-Scale Error Full-Scale Matching(3) Power Supply Rejection ANALOG OUTPUT Voltage Output(4) Output Current Load Capacitance Short-Circuit Current Short-Circuit Duration REFERENCE INPUT VREFH Input Range VREFL Input Range VREFL Input Range DYNAMIC PERFORMANCE Settling Time(5) Channel-to-Channel Crosstalk Output Noise Voltage DIGITAL INPUT/OUTPUT Logic Family Logic Levels VIH VIL Data Format POWER SUPPLY REQUIREMENTS VDD VSS IDD ISS Power Dissipation VSS = ­5V VSS = 0V TEMPERATURE RANGE Specified Performance T Specification same as grade to the left. NOTES: (1) If VSS = 0V, specification applies at code 00AH and above. (2) LSB means Least Significant Bit, with VREFH equal to +2.5V and VREFL equal to ­2.5V, one LSB is 1.22mV. (3) All DAC outputs will match within the specified error band. (4) Ideal output voltage, does not take into account zero or full-scale error. (5) If VSS = ­5V, full-scale step from code 000H to FFF H or vice-versa. If VSS = 0V, full-scale positive step from code 000H to FFFH and negative step from code FFFH to 00AH . ­40 +85 T T °C ­2.1 If VSS 0V 4.75 ­5.25 1.5 ­1.6 15 7.5 20 10 5.25 ­4.75 1.9 T T T T T T T T T T T T V V mA mA mW mW | IIH | 10µA | IIL | 10µA 2.4 ­0.3 Straight Binary VDD+0.3 0.8 T T T T T V V TTL-Compatible CMOS T To ±0.012% Full-Scale Step On Any Other DAC, RL = 2k Bandwidth: 0Hz to 1MHz 40 T nV/Hz 5 0.1 10 T T T µs LSB VSS = 0V or ­5V VSS = 0V VSS = ­5V V REFL + 1 . 2 5 0 ­2.5 +2.5 VREFH­1.25 VREFH­1.25 T T T T T T V V V No Oscillation VSS = 0V or ­5V VREFL ­1.25 100 +5, ­15 Indefinite VREFH +1.25 T T T T T T T V mA pF mA Code = 00AH, VSS = 0V VSS = 0V VSS = 0V Code = FFFH, VSS = 0V VSS = 0V 30 5 Code = FFFH Code = 000H 2 VSS = 0V or ­5V VSS = 0V or ­5V VSS = 0V or ­5V 12 ±4 5 ±2 ±4 ±2 ±8 10 ±4 ±8 ±4 T T T ±2 ±2 ±1 T T T ±1 T ±1 T T ±2 T ±2 ±1 ±1 ±1 LSB(2) LSB LSB Bits LSB ppm/°C LSB LSB LSB LSB ppm/°C LSB LSB LSB ppm/V CONDITIONS MIN TYP MAX DAC7615EB, PB, UB MIN TYP MAX UNITS

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
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DAC7615

2

ABSOLUTE MAXIMUM RATINGS(1)
VDD to VSS ......... ­0.3V to +11V VDD to GND ...... ­0.3V to +5.5V VREFL to VSS ...... ­0.3V to (VDD ­ VSS) VDD to VREFH ..... ­0.3V to (VDD ­ VSS) VREFH to VREFL ... ­0.3V to (VDD ­ VSS) Digital Input Voltage to GND ..... ­0.3V to VDD + 0.3V Maximum Junction Temperature ......... +150°C Operating Temperature Range ........ ­40°C to +85°C Storage Temperature Range ......... ­65°C to +150°C Lead Temperature (soldering, 10s) ..... +300°C NOTE: (1) Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may affect device reliability.

ELECTROSTATIC DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

PACKAGE /ORDERING INFORMATION
MAXIMUM LINEARITY ERROR (LSB) ±2 MAXIMUM DIFFERENTIAL LINEARITY (LSB) ±1 PACKAGE DRAWING NUMBER(1) 180 SPECIFICATION TEMPERATURE RANGE ­40°C to +85°C

PRODUCT DAC7615P DAC7615PB DAC7615U

PACKAGE 16-Pin DIP

ORDERING NUMBER(2) DAC7615P DAC7615PB DAC7615U DAC7615U/1K DAC7615UB DAC7615UB/1K DAC7615E DAC7615E/1K DAC7615EB DAC7615EB/1K

TRANSPORT MEDIA Rails Rails Rails Tape and Reel Rails Tape and Reel Rails Tape and Reel Rails Tape and Reel

"
±2

"
±1

"
16-Lead SOIC

"
211

"
­40°C to +85°C

"
DAC7615UB

"
±1

"
±1

"
16-Lead SOIC

"
211

"
­40°C to +85°C

"
DAC7615E

"
±2 ±1

"
±1 ±1

"
20-Lead SSOP

"
334

"
­40°C to +85°C ­40°C to +85°C

"
DAC7615EB

" "

" "

"
20-Lead SSOP

"
334

" "

"

"

"

NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /1K indicates 1000 devices per reel). Ordering 1000 pieces of "DAC7615EB/1K" will get a single 1000-piece Tape and Reel. For detailed Tape and Reel mechanical information, refer to Appendix B of Burr-Brown IC Data Book.

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3

DAC7615

PIN CONFIGURATION--P, U Packages
Top View PDIP, SOIC

PIN CONFIGURATION--E Package
Top View SSOP

VDD VOUTD VOUTC VREFL VREFH VOUTB VOUTA VSS

1 2 3 4 5 6 7 8 DAC7615P, U

16 15 14 13 12 11 10 9

RESETSEL RESET LOADREG LOADDACS CS CLK SDI GND

VD D V OUTD V OUTC V REFL NIC NIC V REFH V OUTB V OUTA

1 2 3 4 5 DAC7615E 6 7 8 9

20 19 18 17 16 15 14 13 12 11

RESETSEL RESET LOADREG LOADDACS NIC NIC CS CLK SDI GND

VSS 10

PIN DESCRIPTIONS--P, U Packages
PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 LABEL VDD VOUTD VOUTC VREFL VREFH VOUTB VOUTA VSS GND SDI CLK CS LOADDACS DESCRIPTION Positive Analog Supply Voltage, +5V nominal. DAC D Voltage Output DAC C Voltage Output Reference Input Voltage Low. Sets minimum output voltage for all DACs. Reference Input Voltage High. Sets maximum output voltage for all DACs. DAC B Voltage Output DAC A Voltage Output Negative Analog Supply Voltage, 0V or ­5V nominal. Ground Serial Data Input Serial Data Clock Chip Select Input All DAC registers become transparent when LOADDACS is LOW. They are in the latched state when LOADDACS is HIGH. The selected input register becomes transparent when LOADREG is LOW. It is in the latched state when LOADREG is HIGH. Asynchronous Reset Input. Sets DAC and input registers to either zero-scale (000H) or mid-scale (800H) when LOW. RESETSEL determines which code is active. When LOW, a LOW on RESET will cause the DAC and input registers to be set to code 000H. When RESETSEL is HIGH, a LOW on RESET will set the registers to code 800H.

PIN DESCRIPTIONS--E Package
PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 LABEL VDD VOUTD VOUTC VREFL NIC NIC VREFH VOUTB VOUTA VSS GND SDI CLK CS NIC NIC LOADDACS DESCRIPTION Positive Analog Supply Voltage, +5V nominal. DAC D Voltage Output DAC C Voltage Output Reference Input Voltage Low. Sets minimum output voltage for all DACs. Not Internally Connected. Not Internally Connected. Reference Input Voltage High. Sets maximum output voltage for all DACs. DAC B Voltage Output DAC A Voltage Output Negative Analog Supply Voltage, 0V or ­5V nominal. Ground Serial Data Input Serial Data Clock Chip Select Input Not Internally Connected. Not Internally Connected. All DAC registers becomes transparent when LOADDACS is LOW. They are in the latched state when LOADDACS is HIGH. The selected input register becomes transparent when LOADREG is LOW. It is in the latched state when LOADREG is HIGH. Asynchronous Reset Input. Sets all DAC registers to either zero-scale (000H) or mid-scale (800H) when LOW. RESETSEL determines which code is active. When LOW, a LOW on RESET will cause all DAC registers to be set to code 000H. When RESETSEL is HIGH, a LOW on RESET will set the registers to code 800H.

14

LOADREG

15

RESET

16

RESETSEL

18

LOADREG

19

RESET

20

RESETSEL

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DAC7615

4

TYPICAL PERFORMANCE CURVES: VSS = 0V
At TA = +25°C, VDD = +5V, VSS = 0V, VREFH = +2.5V, and VREFL = 0V, representative unit, unless otherwise specified.
LINEARITY ERROR and DIFFERENTIAL LINEARITY ERROR vs CODE (DAC A) 0.50

LINEARITY ERROR and DIFFERENTIAL LINEARITY ERROR vs CODE (DAC B) 0.50 0.25 0.00 ­0.25 ­0.50 0.50

LE (LSB)

0.00 ­0.25 ­0.50 0.50

DLE (LSB)

LE (LSB)

0.25

DLE (LSB)

0.25 0.00 ­0.25 ­0.50 000H 200H 400H 600H 800H A00H C00H E00H FFFH

0.25 0.00 ­0.25 ­0.50 000H 200H 400H 600H 800H A00H C00H E00H FFFH

Digital Input Code

Digital Input Code

LINEARITY ERROR and DIFFERENTIAL LINEARITY ERROR vs CODE (DAC C) 0.50

LINEARITY ERROR and DIFFERENTIAL LINEARITY ERROR vs CODE (DAC D) 0.50
LE (LSB) DLE (LSB)

LE (LSB)

0.25 0.00 ­0.25 ­0.50 0.50

0.25 0.00 ­0.25 ­0.50 0.50 0.25 0.00 ­0.25 ­0.50 000H 200H 400H 600H 800H A00H C00H E00H FFFH

DLE (LSB)

0.25 0.00 ­0.25 ­0.50 000H 200H 400H 600H 800H A00H C00H E00H FFFH

Digital Input Code

Digital Input Code

LINEARITY ERROR vs CODE (DAC A, ­40°C and +85°C) 0.50
LE (LSB)
0.50

LINEARITY ERROR vs CODE (DAC B, ­40°C and +85°C) 0.25 0.00 ­0.25 ­0.50 0.50 +85°C

0.00 ­0.25 ­0.50 0.50 ­40°C

LE (LSB)

0.25

+85°C

LE (LSB)

0.00 ­0.25 ­0.50 000H 200H 400H 600H 800H A00H C00H E00H FFFH

LE (LSB)

0.25

0.25 0.00 ­0.25

­40°C

­0.50 000H

200H

400H

600H

800H

A00H

C00H

E00H

FFFH

Digital Input Code

Digital Input Code

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5

DAC7615