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Details, datasheet, quote on part number:DAC7731E/1K
 
 
Part:DAC7731E/1K
Category:Data Conversion => DAC (Digital to Analog Converters)
Description:ti DAC7731, 16-Bit, Single Channel, Digital-to-analog Converter W/ Internal +10V Reference And Serial I/f
Company:Texas Instruments, Inc.
Datasheet:Download DAC7731E/1K datasheet   File size : 364 kB
Request For quote:  Find where to buy DAC7731E/1K
 



Datasheet text preview:
DAC7731
DAC 773 1

SBAS249 ­ DECEMBER 2001

16-Bit, Voltage Output, Serial Input DIGITAL-TO-ANALOG CONVERTER
FEATURES
q LOW POWER: 150mW MAXIMUM q +10V INTERNAL REFERENCE q UNIPOLAR OR BIPOLAR OPERATION q SETTLING TIME: 5µs to ±0.003% FSR q 16-BIT MONOTINICITY, ­40°C TO +85°C q ±10V, ±5V, OR +10V CONFIGURABLE VOLTAGE OUTPUT q RESET TO ZERO OR MID-SCALE q DOUBLE-BUFFERED DATA INPUT q DAISY-CHAIN FEATURE FOR MULTIPLE DAC7731s ON A SINGLE BUS q SMALL SSOP-24 PACKAGE

DESCRIPTION
The DAC7731 is a 16-bit Digital-to-Analog Converter (DAC) which provides 16 bits of monotonic performance over the specified operating temperature range and offers a +10V internal reference. Designed for automatic test equipment and industrial process control applications, the DAC7731's output swing can be configured in a ±10V, ±5V, or +10V range. The flexibility of the output configuration allows the DAC7731 to provide both unipolar and bipolar operation by pin strapping. The DAC7731 includes a high-speed output amplifier with a maximum settling time of 5µs to ±0.003% FSR for a 20V full-scale change and only consumes 100mW (typical) of power. The DAC7731 features a standard 3-wire, SPI-compatible serial interface with double buffering to allow asynchronous updates of the analog output as well as a serial data output line for daisy-chaining multiple DAC7731's. A user programmable reset control forces the DAC output to either min-scale (0000H) or mid-scale (8000H), overriding both the input and DAC register values. The DAC7731 is available in a SSOP-24 package and three performance grades specified to operate from ­40°C to +85°C.

APPLICATIONS
q PROCESS CONTROL q ATE PIN ELECTRONICS q CLOSED-LOOP SERVO CONTROL q MOTOR CONTROL q DATA ACQUISITION SYSTEMS
VDD VSS VCC REFADJ REFOUT REFIN

VREF ROFFSET Buffer

REFEN RSTSEL RST LDAC SCLK CS Control Logic

+10V Reference

RFB2

RFB1

SJ SDO SDI Enable Input Register DAC Register DAC VOUT

AGND

DGND

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright © 2001, Texas Instruments Incorporated

www.ti.com

ABSOLUTE MAXIMUM RATINGS(1)
VCC to VSS ......... ­0.3V to +32V VCC to AGND .... ­0.3V to +16V VSS to AGND .... ­16V to +0.3V AGND to DGND .......... ­0.3V to 0.3V REFIN to AGND ..... 0V to VCC ­ 1.4V VDD to DGND ...... ­0.3V to +6V Digital Input Voltage to DGND ......... ­0.3V to VDD + 0.3V Digital Output Voltage to DGND ...... ­0.3V to VDD + 0.3V Operating Temperature Range ....... ­40°C to +85°C Storage Temperature Range ........ ­65°C to +150°C Junction Temperature (TJ Max) .... +150°C NOTE: (1) Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may affect device reliability.

ELECTROSTATIC DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

PACKAGE /ORDERING INFORMATION
PRODUCT DAC7731E PACKAGE-LEAD SSOP-24 PACKAGE DESIGNATOR(1) DB SPECIFIED TEMPERATURE RANGE ­40°C to +85°C PACKAGE MARKING DAC7731E ORDERING NUMBER(2) DAC7731E DAC7731E/1K DAC7731EB DAC7731EB/1K DAC7731EC DAC7731EC/1K TRANSPORT MEDIA, QUANTITY Rails, 60 Tape and Reel,1000 Rails, 60 Tape and Reel, 1000 Rails, 60 Tape and Reel, 1000

"
DAC7731EB

"
SSOP-24

"
DB

"
­40°C to +85°C

"
DAC7731EB

"
DAC7731EC

"
SSOP-24

"
DB

"
­40°C to +85°C

"
DAC7731EC

"

"

"

"

"

NOTE: (1) For the most current specifications and package information, refer to our web site at www.ti.com. (2) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /1K indicates 1000 devices per reel). Ordering 1000 pieces of "DAC7731EC/1K" will get a single 1000-piece Tape and Reel.

ELECTRICAL CHARACTERISTICS
All specifications at TA = TMIN to TMAX, VCC = +15V, VSS = ­15V, VDD = +5V, Internal refi/ence enabled, unless otherwise noted. DAC7731E PARAMETER ACCURACY Linearity Error (INL) TA = 25°C Differential Linearity Error (DNL) Monotonicity Offset Error Offset Error Drift Gain Error Gain Error Drift PSRR (VCC or VSS) ANALOG OUTPUT(1) Voltage Output(2) 14 ±2 With Internal REF With External REF With Internal REF At Full-Scale +11.4/­4.75 +11.4/­11.4 +11.4/­6.4 ±5 ±0.1 ±0.4 ±0.25 200 ±0.25 ±0.1 CONDITIONS MIN TYP MAX ±6 ±5 ±4 15 ±0.15 ±7 10.04 9.975 ±10 10.025 ±7 MIN DAC7731EB TYP MAX ±4 ±3 ±2 16 MIN DAC7731EC TYP MAX ±3 ±2 ±1 UNITS

±15 50 0 to 10 ±10 ±5

±10

LSB LSB LSB Bits % of FSR ppm/°C % of FSR % of FSR ppm/°C ppm/V V V V mA pF mA

Output Current Output Impeadance Maximum Load Capacitance Short-Circuit Current Short-Circuit Duration

AGND 9.96

0 .1 200 ±15 Indefinite 10 400 ±15

REFERENCE Reference Output REFOUT Impedance REFOUT Voltage Drift REFOUT Voltage Adjustment(3) REFIN Input Range(4) REFIN Input Current REFADJ Input Range Absolute Max Value that can be applied is VCC REFADJ Input Impedance VREF Output Current VREF Impedance

±25 4.75 0

VCC ­ 1.4 10 10 50









V ppm/°C mV V nA V k mA

­2 1

+2









2

DAC7731
www.ti.com
SBAS249

ELECTRICAL CHARACTERISTICS (Cont.)
All specifications at TA = TMIN to TMAX, VCC = +15V, VSS = ­15V, VDD = +5V, Internal reference enabled, unless otherwise noted. DAC7731E PARAMETER DYNAMIC PERFORMANCE Settling Time to ±0.003% CONDITIONS 20V Output Step RL = 5k, CL = 200pF, with external REFOUT to REFIN filter(5) at 10kHz |IH| < 10µA |IL| < 10µA IOH = ­0.8mA IOL = 1.6mA 0 .7 · V D D 0 .3 · V D D 3.6 0.4 +4.75 +11.4 ­15.75 ­15.75 +5.0 +5.25 +15.75 ­11.4 ­4.75 6 150 +85 MIN TYP 3 MAX 5 MIN DAC7731EB TYP MAX MIN DAC7731EC TYP MAX UNITS µs

Digital Feedthrough Output Noise Voltage DIGITAL INPUT VIH VIL DIGITAL OUTPUT VOH VOL POWER SUPPLY VDD VCC VSS IDD ICC ISS Power TEMPERATURE RANGE Specified Performance

2 100





nV-s nV/Hz V V V V V V V V µA mA mA mW mW °C





Bipolar Operation Unipolar Opeation Unloaded Unloaded No Load, Ext. Reference No Load, Int. Reference

­4

100 4 ­2.5 85 100







­40

Specifications same as grade to the left. NOTES: (1) With minimum VCC/VSS requirements, internal reference enabled. (2) Please refer to the "Theory of Operation" section for more information with respect to output voltage configurations. (3) See Figure 11 for gain and offset adjustment connection diagrams when using the internal reference. (4) The minimum value for REF IN must be equal to the greater of VSS +14V and +4.75V, where +4.75V is the minimum voltage allowed. (5) Reference low-pass filter values: 100k, 1.0µF (see Figure 14).

PIN CONFIGURATION
Top View SSOP

PIN DESCRIPTIONS
PIN 1 2 3 4 5 NAME VCC R EF O U T REFIN REFADJ VREF DESCRIPTION Positive Analog Power Supply Internal Reference Output Reference Input Internal Reference Trim. (Acts as a gain adjustment input when the internal reference is used.) Buffered Output from REFIN, can be used to drive external devices. Internally, this pin directly drives the DAC's circuitry. Offsetting Resistor Analog ground Feedback Resistor 2, used to configure DAC output range. Feedback Resistor 1, used to configure DAC output range. Summing Junction of the Output Amplifier DAC Voltage Output Digital Power Supply Digital Ground Reserved, Connect to DGND No Connection VOUT reset; active LOW, depending on the state of RSTSEL, the DAC register is either reset to midscale or min-scale. DAC register load control, rising dege triggered. Data is loaded from the input register to the DAC register. Serial Data Input. Data is latched into the input register on the rising edge of SCLK. Serial Data Output, delayed 16 SCLK clock cycles. Chip Select, Active LOW Serial Clock Input Reset Select; determines the action of RST. If HIGH, RST will reset the DAC register to mid-scale. If LOW, RST will reset the DAC register to min-scale. Enables internal +10V reference (REFOUT), active LOW. Negative Analog Power Supply

VCC REFOUT REFIN REFADJ VREF ROFFSET AGND RFB2 RFB1 SJ VOUT VDD

1 2 3 4 5 6 DAC7731 7 8 9 10 11 12

24 VSS 23 REFEN 22 RSTSEL 21 SCLK 20 CS 19 SDO 18 SDI 17 LDAC 16 RST 15 NC 14 TEST 13 DGND

6 7 8 9 10 11 12 13 14 15 16

ROFFSET AGND RFB2 RFB1 SJ VOUT VDD DGND TEST NC RST

17 18 19 20 21 22

LDAC SDI SDO CS SCLK RSTSEL

23 NOTE: (1) RST, LDAC, SDI, CS and SCK are Schmitt-triggered inputs. 24

REFEN VSS

DAC7731
SBAS249

www.ti.com

3

TIMING CHARACTERISTICS
VCC = +15V, VSS = ­15V, VDD = 5V; RL = 2k to AGND; CL = 200pF to AGND; all specifications ­40°C to +85°C, unless otherwise noted. DAC7731 PARAMETER t WH tWL t SDI tHDI tSCS tHSC tDDO tHDO tDDOZ tWCSH tWLDL tWLDH tSLD t DLD tSCLK tSRS tHRS tWRL tS DESCRIPTION SCLK HIGH Time SCLK LOW Time Setup Time: Data in valid before rising SCLK Hold Time: Data in valid after rising SCLK Setup Time: CS falling edge before first rising SCLK Hold Time: CS rising edge after 16th rising SCLK Delay Time: CS Falling Edge to Data Out valid, CL = 20pF on SDO Hold Time: Data Out valid after SCLK rising edge, CL 20pF on SDO Delay Time: CS rising edge to SDO = High Impedance CS HIGH Time LDAC LOW Time LDAC HIGH Time Setup Time: 16th Rising SCLK Before LDAC Rising Edge Delay Time: LDAC rising edge to first SCLK rising edge of next transfer cycle. Setup Time: CS High before falling SCLK edge following 16th rising SCLK edge Setup Time: RSTSEL Valid Before RST LOW Hold Time: RSTSEL valid after RST HIGH RST LOW Time DAC VOUT Settling Time M IN 25 25 5 20 15 0 50 50 70 50 20 20 15 15 5 0 20 30 5 TYP MAX UNITS ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns µs

INTERFACE TIMING
tSCS CS tWH SCLK tSDI SDI tDDO tHDO SDO A15 A14 A13 B15 1 2 tHDI B14 B13 tWL 16 tSCLK tHCS tWCSH

B0

C15

C14

C13

C12

Word B tDDOZ A0 tDLD Word A tWLDL tWLDH tSLD tS B15

Word C B14 B13 B12

Word B

LDAC

VOUT ±0.003% of FSR Error Bands

RESET TIMING
tSRS RSTSEL tHRS RST +FS VOUT (RSTSEL = LOW) ­FS +FS VOUT (RSTSEL = HIGH) ­FS Mid-Scale tWRL tS Min-Scale

4

DAC7731
www.ti.com
SBAS249

TYPICAL CHARACTERISTICS
TA = +25°C (unless otherwise noted).

6 4 2 0 ­2 ­4 ­6

LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs DIGITAL INPUT CODE 6 4 2 0 ­2 ­4 ­6

LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs DIGITAL INPUT CODE

INL (LSB)

Bipolar Configuration: VOUT = ­10V to +10V TA = 85°C, Internal Reference Enabled

INL (LSB)

Bipolar Configuration: VOUT = ­10V to +10V TA = 25°C, Internal Reference Enabled

2.0 1.5 1.0 0.5 0.0 ­0.5 ­1.0 ­1.5 ­2.0 0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH Digital Input Code

2.0 1.5 1.0 0.5 0.0 ­0.5 ­1.0 ­1.5 ­2.0 0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH Digital Input Code

DNL (LSB)

Error (mV)

6 4 2 0 ­2 ­4 ­6

LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs DIGITAL INPUT CODE

DNL (LSB)

1.00 0.75 0.50

OFFSET ERROR vs TEMPERATURE

INL (LSB)

VOUT = ­10 to +10V VOUT = 0 to +10V

Bipolar Configuration: VOUT = ­10V to +10V TA = ­40°C, Internal Reference Enabled

0.25 0.00 ­0.25 ­0.50 ­0.75 ­1.00 ­40

2.0 1.5 1.0 0.5 0.0 ­0.5 ­1.0 ­1.5 ­2.0 0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH Digital Input Code

DNL (LSB)

­15

10

35

60

85

Temperature (°C)

0.000 ­0.010 ­0.020 ­0.030

GAIN ERROR vs TEMPERATURE

4.4 4.3 4.2

VCC SUPPLY CURRENT vs DIGITAL INPUT CODE Bipolar Configuration: VOUT = ­10V to +10V Internal Reference Enabled, TA = 25°C

Ext. Ref, Unipolar Mode: VOUT = 0 to +10V
Ext. Ref, Bipolar Mode: VOUT = ­10 to +10V
ICC (mA)

Error (%)

­0.040 ­0.050 ­0.060 ­0.070 ­0.080 ­0.090 ­0.100 ­40 ­15

Int. Ref, Unipolar Mode: VOUT = 0 to +10V

4.1 4.0 3.9

Int. Ref, Bipolar Mode: VOUT = ­10 to +10V Load = 200pF, 2k 10 35 60 85

3.8 3.7 0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH Digital Input Code

Temperature (°C)

DAC7731
SBAS249

www.ti.com

5