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Details, datasheet, quote on part number:DAC7741
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Datasheet text preview:
DAC7741
DAC 774 1
SBAS248 DECEMBER 2001
16-Bit, Single Channel DIGITAL-TO-ANALOG CONVERTER With Internal Reference and Parallel Interface
FEATURES
q LOW POWER: 150mW MAXIMUM q +10V INTERNAL REFERENCE q UNIPOLAR OR BIPOLAR OPERATION q SETTLING TIME: 5µs to ±0.003% FSR q 16-BIT MONOTINICITY, 40°C TO +85°C q ±10V, ±5V OR +10V CONFIGURABLE VOLTAGE OUTPUT q RESET TO MIN-SCALE OR MID-SCALE q DOUBLE-BUFFERED DATA INPUT q INPUT REGISTER DATA READBACK q SMALL LQFP-48 PACKAGE
DESCRIPTION
The DAC7741 is a 16-bit Digital-to-Analog Converter (DAC) which provides 16 bits of monotonic performance over the specified operating temperature range and offers a +10V, low-drift internal reference. Designed for automatic test equipment and industrial process control applications, the DAC7741's output swing can be configured in a ±10V, ±5V, or +10V range. The flexibility of the output configuration allows the DAC7741 to provide both unipolar and bipolar operation by pin strapping. The DAC7741 includes a highspeed output amplifier with a maximum settling time of 5µs to ±0.003% FSR for a 20V full-scale change and only consumes 100mW (typical) of power. The DAC7741 features a standard 16-bit parallel interface with double buffering to allow asynchronous updates of the analog output and data read-back to support data integrity verification prior to an update. A user programmable reset control allows the DAC output to reset to min-scale (0000H) or mid-scale (8000H) overriding the DAC register values. The DAC7741 is available in a LQFP-48 package and three performance grades specified to operate from 40°C to +85°C.
APPLICATIONS
q PROCESS CONTROL q ATE PIN ELECTRONICS q CLOSED-LOOP SERVO CONTROL q MOTOR CONTROL q DATA ACQUISITION SYSTEMS
VDD VSS VCC
REFADJ
REFOUT REFIN
VREF ROFFSET Buffer
REFEN CS R/W RST RSTSEL Control Logic
+10V Reference
RFB2
RFB1
SJ Data I/O 16 I/O Buffer Input Register DAC Register DAC VOUT
AGND
DGND
LDAC
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright © 2001, Texas Instruments Incorporated
www.ti.com
ABSOLUTE MAXIMUM RATINGS(1)
VCC to VSS ......... 0.3V to +32V VCC to AGND .... 0.3V to +16V VSS to AGND .... 16V to +0.3V AGND to DGND ........ 0.3V to +0.3V REFIN to AGND ............ 9V to +11V VDD to DGND ........ 0V to VCC 1.4V Digital Input Voltage to DGND ......... 0.3V to VDD + 0.3V Digital Output Voltage to DGND ...... 0.3V to VDD + 0.3V Operating Temperature Range ....... 40°C to +85°C Storage Temperature Range ........ 65°C to +150°C Junction Temperature ........... +150°C NOTE: (1) Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may affect device reliability.
ELECTROSTATIC DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGE /ORDERING INFORMATION
LINEARITY DIFFERENTIAL ERROR NONLINEARITY PACKAGE (LSB) (LSB) PACKAGE-LEAD DESIGNATOR ±6 ±4 LQFP-48 PT SPECIFIED TEMPERATURE RANGE 40°C to +85°C ORDERING NUMBER DAC7741Y/250 DAC7741Y/2K DAC7741YB/250 DAC7741YB/2K DAC7741YC/250 DAC7741YC/2K PACKAGE MARKING DAC7741Y TRANSPORT MEDIA, QUANTITY Tape and Reel, 250 Tape and Reel, 2000 Tape and Reel, 250 Tape and Reel, 2000 Tape and Reel, 250 Tape and Reel, 2000
PRODUCT DAC7741Y
"
DAC7741YB
"
±4
"
±2
"
LQFP-48
"
PT
"
40°C to +85°C
"
DAC7741YB
"
DAC7741YC
"
±3
"
±1
"
LQFP-48
"
PT
"
40°C to +85°C
"
DAC7741YC
"
"
"
"
"
"
"
NOTE: (1) For the most current specifications and package information refer to our web site at www.ti.com. (2) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., 2K indicates 2000 devices per reel). Ordering 2000 pieces of "DAC7741YC/2K" will get a single 2000-piece Tape and Reel.
ELECTRICAL CHARACTERISTICS
All specifications at TA = TMIN to TMAX, VCC = +15V, VSS = 15V, VDD = +5V, Internal reference enabled, unless otherwise noted. DAC7741Y PARAMETER ACCURACY Linearity Error (INL) TA = 25°C Differential Linearity Error (DNL) Monotonicity Offset Error Offset Error Drift Gain Error Gain Error Drift PSRR (VCC or VSS) ANALOG OUTPUT(1) Voltage Output(2) 14 ±2 With Internal REF With External REF With Internal REF At Full-Scale +11.4/4.75 +11.4/11.4 +11.4/6.4 ±5 ±0.1 T ±0.4 ±0.25 200 ±0.25 ±0.1 T CONDITIONS MIN TYP MAX ±6 ±5 ±4 15 T T ±0.2 T ±7 T T T T T T T T T 10.04 9.975 T T ±10 10.025 T T T T T T T ±7 T T MIN DAC7741YB TYP MAX ±4 ±3 ±2 16 T MIN DAC7741YC TYP MAX ±3 ±2 ±1 UNITS
±15 50 0 to 10 ±10 ±5
±10 T T T T T
LSB LSB LSB Bits % of FSR ppm/°C % of FSR % of FSR ppm/°C ppm/V V V V mA pF mA
Output Current Output Impeadance Maximum Load Capacitance Short-Circuit Current Short-Circuit Duration
AGND 9.96
0.1 200 ±15 Indefinite 10 400 ±15
REFERENCE Reference Output REFOUT Impedance REFOUT Voltage Drift REFOUT Voltage Adjustment(3) REFIN Input Range(4) REFIN Input Current REFADJ Input Range Absolute Max Value that can be applied is VCC REFADJ Input Impedance VREF Output Current VREF Impedance
±25 4.75 0
VCC 1.4 10 10 50
T T T T T
T T
T T T T T
T T
V ppm/°C mV V nA V k mA
2 1
+2
T T
T
T T
T
2
DAC7741
www.ti.com
SBAS248
ELECTRICAL CHARACTERISTICS (Cont.)
All specifications at TA = TMIN to TMAX, VCC = +15V, VSS = 15V, VDD = +5V, Internal reference enabled, unless otherwise noted. DAC7741Y PARAMETER DYNAMIC PERFORMANCE Settling Time to ±0.003% CONDITIONS 20V Output Step RL = 5k, CL = 200pF, with external REFOUT to REFIN filter(5) at 10kHz |IH| < 10µA |IL| < 10µA IOH = 0.8mA IOL = 1.6mA 0.7 · VDD 0.3 · VDD 3.6 0.4 +4.75 +11.4 15.75 15.75 +5.0 +5.25 +15.75 11.4 4.75 6 T 150 +85 T T T T T T T T T T T T T T T T T T T T T T MIN TYP 3 MAX 5 MIN DAC7741YB TYP T MAX T MIN DAC7741YC TYP T MAX T UNITS µs
Digital Feedthrough Output Noise Voltage DIGITAL INPUT VIH VIL DIGITAL OUTPUT VOH VOL POWER SUPPLY VDD VCC VSS IDD ICC ISS Power TEMPERATURE RANGE Specified Performance
2 100 T
T T T T T
T T
nV-s nV/Hz V V V V V V V V µA mA mA mW mW °C
T
T T T T T T
Bipolar Operation Unipolar Opeation Unloaded Unloaded No Load, Ext. Reference No Load, Int. Reference
4
100 4 2.5 85 100
T T T T T
T T T T T
T T
40
T Specifications same as grade to the left. NOTES: (1) With minimum VCC/VSS requirements, internal reference enabled. (2) Please refer to the "Theory of Operation" section for more information with respect to output voltage configurations. (3) See Figure 7 for gain and offset adjustment connection diagrams when using the internal reference. (4) The minimum value for REF IN must be equal to the greater of VSS +14V and +4.75V, where +4.75V is the minimum voltage allowed. (5) Reference low-pass filter values: 100k, 1.0µF (See Figure 10).
DAC7741
SBAS248
www.ti.com
3
PIN CONFIGURATION
RSTSEL REFADJ REFOUT Top View REFIN NC LQFP DGND 37 36 NC 35 DB15 34 DB14 33 DB13 32 DB12 31 DB11 30 DB10 29 DB9 28 DB8 27 DB7 26 TEST 25 NC 13 NC 14 NC 15 NC 16 DB0 17 DB1 18 DB2 19 DB3 20 DB4 21 DB5 22 DB6 23 NC 24 NC DESCRIPTION Data Bit 8 Data Bit 9 Data Bit 10 Data Bit 11 Data Bit 12 Data Bit 13 Data Bit 14 Data Bit 15 (MSB) No Connection Digital Ground Digital Power Supply VOUT reset; active LOW, depending on the state of RSTSEL, the DAC register is either reset to midscale or min-scale. DAC register load control, rising edge triggered. Data is loaded from the input register to the DAC register. Chip Select, active LOW Enabled by CS, controls data read (HIGH) and write (LOW) from or to the input register. Reset Select; determines the action of RST. If HIGH, RST will reset the DAC register to midscale. If LOW, RST will reset the DAC register to min-scale. Enables internal +10V reference (REFOUT), active LOW. Internal Reference Output Internal Reference Trim. (Acts as a gain adjustment input when the internal reference is used.) Reference Input No Connection LDAC RST 39 R/W V DD 38 CS 41 REFEN
48 NC VSS VCC VREF ROFFSET AGND AGND RFB2 RFB1 1 2 3 4 5 6 7 8 9
47
46
45
44
43
42
40
DAC7741
SJ 10 VOUT 11 NC 12
PIN DESCRIPTIONS
PIN 1 2 3 4 NAME NC VSS VCC VREF DESCRIPTION No Connection Negative Analog Power Supply. Positive Analog Power Supply. Buffered Output from REFIN, can be used to drive external devices. Internally, this pin directly drives the DAC's circuitry. Offseting Resistor Analog ground (Must be tied to analog ground) Analog ground (Must be tied to analog ground) Feedback Resistor 2, used to configure DAC output range. Feedback Resistor 1, used to configure DAC output range. Summing Junction of the Output Amplifier DAC Voltage Output No Connection No Connection No Connection No Connection Data Bit 0 (LSB) Data Bit 1 Data Bit 2 Data Bit 3 Data Bit 4 Data Bit 5 Data Bit 6 No Conneciton No Connection No Connection Reserved, Connect to DGND Data Bit 7 47 48 REFIN NC 45 46 REFOUT REFADJ 44 REFEN 41 42 43 CS R/W RSTSEL 40 LDAC PIN 28 29 30 31 32 33 34 35 36 37 38 39 NAME DB8 DB9 DB10 DB11 DB12 DB13 DB14 DB15 NC DGND VDD RST
5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
ROFFSET AGND AGND RFB2 RFB1 SJ VOUT NC NC NC NC DB0 DB1 DB2 DB3 DB4 DB5 DB6 NC NC NC TEST DB7
4
DAC7741
www.ti.com
SBAS248
TIMING CHARACTERISTICS
DAC7741Y PARAMETER tRCS tRDS tRDH tDZ tCSD tWCS tWS tWH tLS tLH tLX tDS tDH tLWD tSS tSH tRSS tS DESCRIPTION CS LOW for Read R/W HIGH to CS LOW R/W HIGH after CS HIGH CS HIGH to Data Bus High Impedance CS LOW to Data Bus Valid CS LOW for Write R/W LOW to CS LOW R/W LOW after CS HIGH CS LOW to LDAC HIGH CS LOW after LDAC HIGH LDAC HIGH Data Valid to CS LOW Data Valid after CS HIGH LDAC LOW RSTSEL Valid Before RST LOW RSTSEL Valid After RST HIGH RST LOW Voltage Output Settling Time MIN 100 10 10 10 85 30 10 10 40 0 30 0 20 40 0 10 30 5 TYP MAX UNITS ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns µs
70 100
TIMING DIAGRAMS
CS tWS R/W
tWCS tWH
CS tRCS tRDS R/W tRDH
tDH Data In DB15-DB0 Data Valid tDS tLS tLWD tLX tS VOUT
tLH
Data Out DB15-DB0 Data Valid tCSD
tDZ
LDAC
WRITE CYCLE
±0.003% of FSR Error Bands
READ CYCLE
RESET TIMING
tSS RSTSEL tSH RST +FS VOUT (RSTSEL = LOW) FS +FS VOUT (RSTSEL = HIGH) FS Mid-Scale tRSS tS Min-Scale
DAC7741
SBAS248
www.ti.com
5
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