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Details, datasheet, quote on part number:JM38510/65604BRA
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Datasheet text preview:
SN54HC574, SN74HC574 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SCLS148F DECEMBER 1982 REVISED AUGUST 2003
D D D D D D D
Wide Operating Voltage Range of 2 V to 6 V High-Current 3-State Noninverting Outputs Drive Bus Lines Directly or Up To 15 LSTTL Loads Low Power Consumption, 80-µA Max ICC Typical tpd = 22 ns ±6-mA Output Drive at 5 V Low Input Current of 1 µA Max Bus-Structured Pinout
SN54HC574 . . . J OR W PACKAGE SN74HC574 . . . DB, DW, N, NS, OR PW PACKAGE (TOP VIEW)
description/ordering information
These octal edge-triggered D-type flip-flops feature 3-state outputs designed specifically for bus driving. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight flip-flops enter data on the low-to-high transition of the clock (CLK) input. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. ORDERING INFORMATION
TA PDIP N SOIC DW 85°C 40°C to 85 C SSOP DB SOP NS TSSOP PW CDIP J 55°C to 125 C 125°C CFP W LCCC FK PACKAGE Tube of 20 Tube of 25 Reel of 2000 Reel of 2000 Reel of 2000 Tube of 70 Reel of 2000 Reel of 250 Tube of 20 Tube of 85 Tube of 55
OE 1D 2D 3D 4D 5D 6D 7D 8D GND
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
VCC 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q CLK
SN54HC574 . . . FK PACKAGE (TOP VIEW)
3D 4D 5D 6D 7D
4 5 6 7 8
3 2 1 20 19 18 17 16 15 14 9 10 11 12 13
OE VCC 1Q 2Q 3Q 4Q 5Q 6Q
ORDERABLE PART NUMBER SN74HC574N SN74HC574DW SN74HC574DWR SN74HC574DBR SN74HC574NSR SN74HC574PW SN74HC574PWR SN74HC574PWT SNJ54HC574J SNJ54HC574W SNJ54HC574FK
SNJ54HC574FK Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
8D GND CLK 8Q 7Q
TOP-SIDE MARKING SN74HC574N HC574 HC574 HC574 HC574 SNJ54HC574J SNJ54HC574W
2D 1D
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SN54HC574, SN74HC574 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SCLS148F DECEMBER 1982 REVISED AUGUST 2003
description/ordering information (continued)
OE does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
FUNCTION TABLE (each flip-flop) INPUTS OE L L L H CLK H or L X D H L X X OUTPUT Q H L Q0 Z
logic diagram (positive logic)
OE CLK 1 11
C1 1D 2 1D
19
1Q
To Seven Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Input clamp current, IIK (VI VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Output clamp current, IOK (VO VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±35 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±70 mA Package thermal impedance, JA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7.
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN54HC574, SN74HC574 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SCLS148F DECEMBER 1982 REVISED AUGUST 2003
recommended operating conditions (see Note 3)
SN54HC574 MIN VCC VIH Supply voltage High-level input voltage VCC = 2 V VCC = 4.5 V VCC = 6 V VCC = 2 V VIL VI VO t/v Low-level input voltage Input voltage Output voltage Input transition rise/fall time VCC = 2 V VCC = 4.5 V VCC = 4.5 V VCC = 6 V 0 0 2 1.5 3.15 4.2 0.5 1.35 1.8 VCC VCC 1000 500 0 0 NOM 5 MAX 6 SN74HC574 MIN 2 1.5 3.15 4.2 0.5 1.35 1.8 VCC VCC 1000 500 ns V V V V NOM 5 MAX 6 UNIT V
VCC = 6 V 400 400 TA Operating free-air temperature 55 125 40 85 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS VCC 2V IOH = 20 µA A VOH VI = VIH or VIL IOH = 6 mA IOH = 7.8 mA IOL = 20 µA A VOL VI = VIH or VIL IOL = 6 mA IOL = 7.8 mA II IOZ ICC Ci VI = VCC or 0 VO = VCC or 0 VI = VCC or 0, IO = 0 4.5 V 6V 4.5 V 6V 2V 4.5 V 6V 4.5 V 6V 6V 6V 6V 2 V to 6 V 3 MIN 1.9 4.4 5.9 3.98 5.48 TA = 25°C TYP MAX 1.998 4.499 5.999 4.3 5.8 0.002 0.001 0.001 0.17 0.15 ±0.1 ±0.01 0.1 0.1 0.1 0.26 0.26 ±100 ±0.5 8 10 SN54HC574 MIN 1.9 4.4 5.9 3.7 5.2 0.1 0.1 0.1 0.4 0.4 ±1000 ±10 160 10 MAX SN74HC574 MIN 1.9 4.4 5.9 3.84 5.34 0.1 0.1 0.1 0.33 0.33 ±1000 ±5 80 10 nA µA µA pF V V MAX UNIT
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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