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Details, datasheet, quote on part number:JM38510/65705BSA
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Datasheet text preview:
SN54HC244, SN74HC244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SCLS130D DECEMBER 1982 REVISED AUGUST 2003
D D D
Wide Operating Voltage Range of 2 V to 6 V High-Current Outputs Drive Up To 15 LSTTL Loads 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers
D D D D
Low Power Consumption, 80-µA Max ICC Typical tpd = 11 ns ±6-mA Output Drive at 5 V Low Input Current of 1 µA Max
2Y 4 1A 1 1OE VCC
1OE 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
VCC 2OE 1Y1 2A4 1Y2 2A3 1Y3 2A2 1Y4 2A1
1A2 2Y3 1A3 2Y2 1A4
4 5 6 7 8
3 2 1 20 19 18 17 16 15 14 9 10 11 12 13
2OE 1Y1 2A4 1Y2 2A3 1Y3
SN54HC244 . . . J OR W PACKAGE SN74HC244 . . . DB, DW, N, NS, OR PW PACKAGE (TOP VIEW)
SN54HC244 . . . FK PACKAGE (TOP VIEW)
description/ordering information
These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The 'HC244 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes noninverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. ORDERING INFORMATION
TA PDIP N SOIC DW 40°C to 85 C 85°C SOP NS SSOP DB TSSOP PW CDIP J 125°C 55°C to 125 C CFP W LCCC FK PACKAGE Tube of 20 Tube of 25 Reel of 2000 Reel of 2000 Reel of 2000 Tube of 70 Reel of 2000 Reel of 250 Tube of 20 Tube of 85 Tube of 55 ORDERABLE PART NUMBER SN74HC244N SN74HC244DW SN74HC244DWR SN74HC244NSR SN74HC244DBR SN74HC244PW SN74HC244PWR SN74HC244PWT SNJ54HC244J SNJ54HC244W SNJ54HC244FK SNJ54HC244J SNJ54HC244W HC244 TOP-SIDE MARKING SN74HC244N HC244 HC244 HC244
SNJ54HC244FK Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
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2Y1 GND 2A1 1Y4 2A2
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SN54HC244, SN74HC244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SCLS130D DECEMBER 1982 REVISED AUGUST 2003
FUNCTION TABLE (each buffer/driver) INPUTS OE L L H A H L X OUTPUT Y H L Z
logic diagram (positive logic)
1OE 1 2OE 19
1A1
2
18
1Y1
2A1
11
9
2Y1
1A2
4
16
1Y2
2A2
13
7
2Y2
1A3
6
14
1Y3
2A3
15
5
2Y3
1A4
8
12
1Y4
2A4
17
3
2Y4
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Input clamp current, IIK (VI VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Output clamp current, IOK (VO VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±35 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±70 mA Package thermal impedance, JA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7.
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POST OFFICE BOX 655303
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SN54HC244, SN74HC244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SCLS130D DECEMBER 1982 REVISED AUGUST 2003
recommended operating conditions (see Note 3)
SN54HC244 MIN VCC VIH Supply voltage High-level input voltage VCC = 2 V VCC = 4.5 V VCC = 6 V VCC = 2 V VIL VI VO t/v Low-level input voltage Input voltage Output voltage Input transition rise/fall time VCC = 2 V VCC = 4.5 V VCC = 4.5 V VCC = 6 V 0 0 2 1.5 3.15 4.2 0.5 1.35 1.8 VCC VCC 1000 500 0 0 NOM 5 MAX 6 SN74HC244 MIN 2 1.5 3.15 4.2 0.5 1.35 1.8 VCC VCC 1000 500 ns V V V V NOM 5 MAX 6 UNIT V
VCC = 6 V 400 400 TA Operating free-air temperature 55 125 40 85 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS VCC 2V IOH = 20 µA A VOH VI = VIH or VIL IOH = 6 mA IOH = 7.8 mA IOL = 20 µA A VOL VI = VIH or VIL IOL = 6 mA IOL = 7.8 mA II IOZ ICC Ci VI = VCC or 0 VO = VCC or 0, VI = VCC or 0, VI = VIH or VIL IO = 0 4.5 V 6V 4.5 V 6V 2V 4.5 V 6V 4.5 V 6V 6V 6V 6V 2 V to 6 V 3 MIN 1.9 4.4 5.9 3.98 5.48 TA = 25°C TYP MAX 1.998 4.499 5.999 4.3 5.8 0.002 0.001 0.001 0.17 0.15 ±0.1 ±0.01 0.1 0.1 0.1 0.26 0.26 ±100 ±0.5 8 10 SN54HC244 MIN 1.9 4.4 5.9 3.7 5.2 0.1 0.1 0.1 0.4 0.4 ±1000 ±10 160 10 MAX SN74HC244 MIN 1.9 4.4 5.9 3.84 5.34 0.1 0.1 0.1 0.33 0.33 ±1000 ±5 80 10 nA µA µA pF V V MAX UNIT
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SN54HC244, SN74HC244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SCLS130D DECEMBER 1982 REVISED AUGUST 2003
switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1)
PARAMETER FROM (INPUT) TO (OUTPUT) VCC 2V tpd A Y 4.5 V 6V 2V ten OE Y 4.5 V 6V 2V tdis OE Y 4.5 V 6V 2V tt Y 4.5 V 6V MIN TA = 25°C TYP MAX 40 13 11 75 15 13 75 15 13 28 8 6 115 23 20 150 30 26 150 30 26 60 12 10 SN54HC244 MIN MAX 170 34 29 225 45 38 225 45 38 90 18 15 SN74HC244 MIN MAX 145 29 25 190 38 32 190 38 32 75 15 13 ns ns ns ns UNIT
switching characteristics over recommended operating free-air temperature range, CL = 150 pF (unless otherwise noted) (see Figure 1)
PARAMETER FROM (INPUT) TO (OUTPUT) VCC 2V tpd A Y 4.5 V 6V 2V ten OE Y 4.5 V 6V 2V tt Y 4.5 V 6V TA = 25°C MIN TYP MAX 56 18 15 100 20 17 45 17 13 165 33 28 200 40 34 210 42 36 SN54HC244 MIN MAX 245 49 42 300 60 51 315 63 53 SN74HC244 MIN MAX 210 42 35 250 50 43 265 53 45 ns ns ns UNIT
operating characteristics, TA = 25°C
PARAMETER Cpd Power dissipation capacitance per buffer/driver TEST CONDITIONS No load TYP 35 UNIT pF
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SN54HC244, SN74HC244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SCLS130D DECEMBER 1982 REVISED AUGUST 2003
PARAMETER MEASUREMENT INFORMATION
VCC PARAMETER Test Point S1 RL ten tPZH tPZL tPHZ tPLZ 1 k RL 1 k CL 50 pF or 150 pF 50 pF 50 pF or 150 pF S1 Open Closed Open Closed Open S2 Closed Open Closed Open Open
From Output Under Test CL (see Note A)
S2
tdis
tpd or tt LOAD CIRCUIT VCC Input 50% tPLH In-Phase Output 50% 10% tPHL Out-of-Phase Output 90% 50% 10% tf 90% tr tPLH 50% 10% 90% tr VOH VOL 50% 0V tPHL 90% VOH 50% 10% V OL tf
Output Control (Low-Level Enabling) tPZL Output Waveform 1 (See Note B) tPZH
VCC 50% 50% 0V tPLZ VCC 50% 10% tPHZ 50% 90% VOH 0 V VCC VOL
VOLTAGE WAVEFORMS PROPAGATION DELAY AND OUTPUT TRANSITION TIMES VCC 50% 10% 0 V tf
Input
50% 10%
90%
90%
Output Waveform 2 (See Note B)
tr VOLTAGE WAVEFORM INPUT RISE AND FALL TIMES
VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS
NOTES: A. CL includes probe and test-fixture capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO = 50 , tr = 6 ns, tf = 6 ns. D. The outputs are measured one at a time with one input transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
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