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Part: MSP-EVK430B320
Category:
Microcontrollers
-> Ultra-Low Power Microcontrollers
Description: ti MSP430P325, 16-Bit Ultra-low-power Microcontroller,16kB Otp, 512B RAM, 14 Bit ADC, 84 Segment LCD
Company: Texas Instruments, Inc.
Datasheet: Download MSP-EVK430B320 datasheet File size : 684 kB
Request For quote: Find where to buy MSP-EVK430B320
Datasheet text preview:
MSP430P325 MIXED SIGNAL MICROCONTROLLER
SLAS164A FEBRUARY 1998 REVISED MARCH 2000
D D D D D D D D
Low Supply Voltage Range, 2.7 V 5.5 V Low Operation Current, 3 mA at 1 MHz, 3V Ultralow Power Consumption (Standby Mode Down to 0.1 mA) Five Power-Saving Modes Wakeup From Standby Mode in 6 ms 16-Bit RISC Architecture, 300 ns Instruction Cycle Time Single Common 32 kHz Crystal, Internal System Clock up to 3.3 MHz Integrated LCD Driver for up to 84 Segments
D D D D D D
Integrated 12+2 Bit A/D Converter Family Members Include: MSP430P325, 16KB OTP, 512 Byte RAM EPROM Version Available for Prototyping: PMS430E325 Serial Onboard Programming Programmable Code Protection by Security Fuse Avaliable in 64 Pin Quad Flatpack (QFP), 68 Pin Plastic J-Leaded Chip Carrier (PLCC), 68 Pin J-Leaded Ceramic Chip Carrier (JLCC) Package (EPROM Version)
description
The Texas Instruments MSP430 is an ultralow-power mixed-signal microcontroller family consisting of several devices which feature different sets of modules targeted to various applications. The microcontroller is designed to be battery operated for an extended application lifetime. With 16-bit RISC architecture, 16-bit integrated registers on the CPU, and a constant generator, the MSP430 achieves maximum code efficiency. The digitallycontrolled oscillator, together with the frequency-locked-loop (FLL), provides a wakeup from a low-power mode to active mode in less than 6 ms.
PG Package (TOP VIEW)
64 63 62 61 60 59 58 57 56 55 54 53 52
DVSS AVSS A1 A0 XBUF RST/NMI TCK TMS TDI/VPP TDO/TDI COM3 COM2 COM1 AVCC DVCC SVCC Rext A2 A3 A4 A5 Xin Xout/TCLK CIN TP0.0 TP0.1 TP0.2 TP0.3 TP0.4 TP0.5 P0.0 P0.1/RXD
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
COM0 S20/O20/CMPI S19/O19 S18/O18 S17/O17 S16/O16 S15/O15 S14/O14 S13/O13 S12/O12 S11/O11 S10/O10 S9/O9 S8/O8 S7/O7 S6/O6 S5/O5 S4/O4 S3/O3
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright © 2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
P0.2/TXD P0.3 P0.4 P0.5 P0.6 P0.7 R33 R23 R13 R03 S0 S1 S2/O2
POST OFFICE BOX 655303
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1
MSP430P325 MIXED SIGNAL MICROCONTROLLER
SLAS164A FEBRUARY 1998 REVISED MARCH 2000
description (continued)
Typical applications include sensor systems that capture analog signals, convert them to digital values, and then process the data and display them or transmit them to a host system. The MSP430x32x offers an integrated 12+2 bit A/D converter with six multiplexed inputs.
AVAILABLE OPTIONS PACKAGED DEVICES TA 40°C to 85°C to 85°C 25°C PLASTIC 64-PIN QFP (PG) MSP430P325IPG -- PLASTIC 64-PIN QFP (PM) MSP430P325IPM -- PLASTIC 68-PIN PLCC (FN) MSP430P325IFN -- CERAMIC 68-PIN JLCC (FZ) -- PMS430E325FZ
functional block diagram
XIN Xout/TCLK XBUF RST/NMI P0.0 P0.7
Oscillator FLL System Clock TDI/VPP TDO/TDI
ACLK MCLK
8/16 kB ROM 16 kB OTP 'C': ROM 'P': OTP
256/512 B RAM
Power-onReset
8 b Timer/ Counter Serial Protocol Support
I/O Port TXD 8 I/O's, All With Interr. Cap. 3 Int. Vectors RXD
MAB, 16 Bit
MAB, 4 Bit
CPU Incl. 16 Reg.
Test JTAG MDB, 16 Bit Bus Conv
MCB MDB, 8 Bit
TMS TCK ADC 12 + 2 Bit 6 Channels Current S. Watchdog Timer 15/16 Bit Timer/Port Applications: A/D Conv. Timer, O/P Basic Timer1 f LCD CMPI 6 6 LCD 84 Segments 1, 2, 3, 4 MUX Com03 S019/O219 S20/O20CMPI
A05 SVCC Rext
TP0.05 CIN
R33 R23
R13 R03
2
POST OFFICE BOX 655303
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MSP430P325 MIXED SIGNAL MICROCONTROLLER
SLAS164A FEBRUARY 1998 REVISED MARCH 2000
Terminal Functions
TERMINAL NAME AVCC AVSS A0 A1 A2A5 CIN COM03 DVCC DVSS P0.0 P0.1/RXD P0.2/TXD P0.3P0.7 Rext RST/NMI R03 R13 R23 R33 SVCC S0 S1 S2S5/O2O5 S20/O20/CMPI S6S9/O6O9 S10S13/O10O13 S14S17/O14O17 S18-S19/O18-O19 TCK TDO/TDI TDI/VPP TMS TP0.0 TP0.1 TP0.2 TP0.3 TP0.4 TP0.5 XBUF Xin Xout/TCLK NO. 1 63 61 62 58 11 5154 2 64 18 19 20 2125 4 59 29 28 27 26 3 30 31 3235 50 3639 4043 4447 48, 49 58 55 56 57 12 13 14 15 16 17 60 9 10 O O O I/O O O O O I I/O I I O O O O O I/O O I I/O I/O I/O I/O I/O I I I I I O I I I I O I/O Positive analog supply voltage Analog ground reference Analog-to-digital converter input port 0 or digital input port 0 Analog-to-digital converter input port 1 or digital input port 1 Analog-to-digital converter inputs ports 25 or digital inputs ports 25 Input used as enable of counter TPCNT1 Timer/Port Common outputs, used for LCD backplanes LCD Positive digital supply voltage Digital ground reference General-purpose digital I/O General-purpose digital I/O, receive digital input port, 8-Bit Timer/Counter General-purpose digital I/O, transmit data output port, 8-Bit Timer/Counter Five general-purpose digital I/Os, bit 3 to bit 7 Programming resistor input of internal current source Reset input or non-maskable interrupt input Input of fourth positive analog LCD level (V4) LCD Input of third positive analog LCD level (V3) LCD Input of second positive analog LCD level (V2) LCD Output of first positive analog LCD level (V1) LCD Switched AVCC to analog-to-digital converter Segment line S0 LCD Segment line S1 LCD Segment lines S2 to S5 or digital output ports O2O5, group 1 LCD Segment line S20 can be used as comparator input port CMPI Timer/Port Segment lines S6 to S9 or digital output ports O6O9, group 2 LCD Segment lines S10 to S13 or digital output ports O10O13, group 3 LCD Segment lines S14 to S17 or digital output ports O14 to O17, group 4 LCD Segment lines S18 and S19 or digital output port O18 and O19, group 5 LCD Test clock, clock input terminal for device programming and test Test data output, data output terminal or data input during programming Test data input, data input terminal or input of programming voltage Test mode select, input terminal for device programming and test General-purpose 3-state digital output port, bit 0 Timer/Port General-purpose 3-state digital output port, bit 1 Timer/Port General-purpose 3-state digital output port, bit 2 Timer/Port General-purpose 3-state digital output port, bit 3 Timer/Port General-purpose 3-state digital output port, bit 4 Timer/Port General-purpose digital input/output port, bit 5 Timer/Port Clock signal output of system clock MCLK or crystal clock ACLK Input terminal of crystal oscillator Output terminal of crystal oscillator or test clock input DESCRIPTION
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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