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Part: PAL16L8A-2MJB
Category:
FPGAs/PLDs
-> GALs/PALs
-> PALs
Description: ti PAL16L8A-2M, Standard High-speed PAL<R> Circuits
Company: Texas Instruments, Inc.
Datasheet: Download PAL16L8A-2MJB datasheet File size : 1656 kB
Request For quote: Find where to buy PAL16L8A-2MJB
Datasheet text preview:
PAL16L8AM, PAL16L8A-2M, PAL16R4AM, PAL16R4A-2M PAL16R6AM, PAL16R6A-2M, PAL16R8AM, PAL16R8A-2M STANDARD HIGH-SPEED PALŽ CIRCUITS
SRPS016 D2705, FEBRUARY 1984 REVISED MARCH 1992
ˇ ˇ ˇ
Choice of Operating Speeds High-Speed, A Devices . . . 25 MHz Min Half-Power, A-2 Devices . . . 16 MHz Min Choice of Input/Output Configuration Package Options Include Both Ceramic DIP and Chip Carrier in Addition to Ceramic Flat Package
DEVICE PAL16L8 PAL16R4 PAL16R6 PAL16R8 I INPUTS 10 8 8 8 3-STATE O OUTPUTS 2 0 0 0 REGISTERED Q OUTPUTS 0 4 (3-state buffers) 6 (3-state buffers) 8 (3-state buffers) I/O PORT S 6 4 2 0
PAL16L8' J OR W PACKAGE (TOP VIEW)
I I I I I I I I I GND
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
VC C O I/O I/O I/O I/O I/O I/O O I
description
These programmable array logic devices feature high speed and a choice of either standard or half-power devices. They combine Advanced Low-Power Schottky technology with proven titanium-tungsten fuses. These devices will provide reliable, high-performance substitutes for conventional TTL logic. Their easy programmability allow for quick design of "custom" functions and typically results in a more compact circuit board. In addition, chip carriers are available for further reduction in board space. The Half-Power versions offer a choice of operating frequency, switching speeds, and power dissipation. In many cases, these Half-Power devices can result in significant power reduction from an overall system level. The PAL16' M series is characterized for operation over the full military temperature range of 55°C to 125°C.
PAL16L8' FK PACKAGE (TOP VIEW)
I I I I I
4 5 6 7 8
3 2 1 20 19 18 17 16 15 14 9 10 11 12 13
I I I VCC O I/O I/O I/O I/O I/O
Copyright Š 1992, Texas Instruments Incorporated
PAL is a registered trademark of Advanced Micro Devices Inc.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
ˇ DALLAS, TEXAS 75265
I GND I O I/O
1
PAL16R4AM, PAL16R4A-2M, PAL16R6AM, PAL16R6A-2M, PAL16R8AM, PAL16R8A-2M STANDARD HIGH-SPEED PALŽ CIRCUITS
SRPS016 D2705, FEBRUARY 1984 REVISED MARCH 1992
PAL16R4' J OR W PACKAGE (TOP VIEW)
PAL16R4' FK PACKAGE (TOP VIEW)
10
11
PAL16R6' J OR W PACKAGE (TOP VIEW)
10
11
PAL16R8' J OR W PACKAGE (TOP VIEW)
10
11
2
POST OFFICE BOX 655303
ˇ DALLAS, TEXAS 75265
I GND
OE Q Q
CLK I I I I I I I I GND
1 2 3 4 5 6 7 8 9
20 19 18 17 16 15 14 13 12
VC C Q Q Q Q Q Q Q Q OE
I I I I I
4 5 6 7 8
3 2 1 20 19 18 17 16 15 14 9 10 11 12 13
I I CLK VCC Q Q Q Q Q Q
I GND
PAL16R8' FK PACKAGE (TOP VIEW)
OE I/O Q
CLK I I I I I I I I GND
1 2 3 4 5 6 7 8 9
20 19 18 17 16 15 14 13 12
VC C I/O Q Q Q Q Q Q I/O OE
I I I I I
4 5 6 7 8
3 2 1 20 19 18 17 16 15 14 9 10 11 12 13
I I CLK VCC I/O Q Q Q Q Q
I GND
PAL16R6' FK PACKAGE (TOP VIEW)
OE I/O I/O
CLK I I I I I I I I GND
1 2 3 4 5 6 7 8 9
20 19 18 17 16 15 14 13 12
VC C I/O I/O Q Q Q Q I/O I/O OE
I I I I I
4 5 6 7 8
3 2 1 20 19 18 17 16 15 14 9 10 11 12 13
I I C LK VCC I/O I/O Q Q Q Q
PAL16L8AM, PAL16L8A-2M, PAL16R4AM, PAL16R4A-2M STANDARD HIGH-SPEED PALŽ CIRCUITS
SRPS016 D2705, FEBRUARY 1984 REVISED MARCH 1992
functional block diagrams (positive logic)
PAL16L8AM PAL16L8A-2M & 32 X 64 EN 1
7 7
O O I/O I/O I/O I/O I/O I/O
16 x I 10 16
7 7
6
16
7 7 7 7 6
PAL16R4AM PAL16R4A-2M OE CLK & 32 X 64 8 8 8 16 8 4 4 16 7 7 7 7 4 4 EN 1 I/O I/O I/O I/O Q 1 EN 2 C1 I=0 2 1D Q Q Q
16 x I 8
denotes fused inputs
POST OFFICE BOX 655303
ˇ DALLAS, TEXAS 75265
3
PAL16R6AM, PAL16R6A-2M, PAL16R8AM, PAL16R8A-2M STANDARD HIGH-SPEED PALŽ CIRCUITS
SRPS016 D2705, FEBRUARY 1984 REVISED MARCH 1992
functional block diagrams (positive logic)
PAL16R6AM PAL16R6A-2M OE CLK & 32 X 64 8 8 8 16 8 6 8 2 16 8 EN 1 Q Q Q 1 EN 2 C1 I=0 2 1D Q Q Q
16 x I 8
7 7 2 6
I/O I/O
PAL16R8AM PAL16R8A-2M OE CLK & 32 X 64 8 8 8 16 8 8 8 16 8 8 8 Q Q Q Q Q 1 EN 2 C1 I=0 2 1D Q Q Q
16 x I 8
8 denotes fused inputs
4
POST OFFICE BOX 655303
ˇ DALLAS, TEXAS 75265
PAL16L8AM, PAL16L8A-2M STANDARD HIGH-SPEED PALŽ CIRCUITS
SRPS016 D2705, FEBRUARY 1984 REVISED MARCH 1992
logic diagram (positive logic)
I 1 Increment 0 4 8 12 16 20 24 28 31
First Fuse Numbers
0 32 64 96 128 160 192 224
19
O
I
2
I
3
256 288 320 352 384 416 448 480 512 544 576 608 640 672 704 736 768 800 832 864 896 928 960 992 1024 1056 1088 1120 1152 1184 1216 1248 1280 1312 1344 1376 1408 1440 1472 1504 1536 1568 1600 1632 1664 1696 1728 1760 1792 1824 1856 1888 1920 1952 1984 2016
18
I/O
17
I/O
I
4
16
I/O
I
5
15
I/O
I
6
14
I/O
I
7
13
I/O
I
8
12
O
I
9
11
I
Fuse number = First fuse number + Increment
POST OFFICE BOX 655303
ˇ DALLAS, TEXAS 75265
5
Others parts begin by pa
PA-1 PA-2 PA-3 PA-4 PA-5 PA-6 PA-7 PA-8 PA-9 PA-10
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