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Part: PGA103
Category:
Analog & Mixed-Signal Processing
-> Amplifiers
-> Instrumentation Amplifiers
Description:
Company: Texas Instruments, Inc.
Datasheet: Download PGA103 datasheet File size : 78 kB
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Datasheet text preview:
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PGA103
Programmable Gain AMPLIFIER
FEATURES
q DIGITALLY PROGRAMABLE GAINS: G=1, 10, 100V/V q CMOS/TTL-COMPATIBLE INPUTS q LOW GAIN ERROR: ±0.05% max, G=10 q LOW OFFSET VOLTAGE DRIFT: 2µV/°C q LOW QUIESCENT CURRENT: 2.6mA q LOW COST q 8-PIN PLASTIC DIP, SO-8 PACKAGES
DESCRIPTION
The PGA103 is a programmable-gain amplifier for general purpose applications. Gains of 1, 10, or 100 are digitally selected by two CMOS/TTL-compatible inputs. The PGA103 is ideal for systems that must handle wide dynamic range signals. The PGA103's high speed circuitry provides fast settling time, even at G=100 (8µs to 0.01%). Bandwidth is 250kHz at G=100, yet quiescent current is only 2.6mA. It operates from ±4.5V to ±18V power supplies. The PGA103 is available in 8-pin plastic DIP and SO-8 surface-mount packages, specified for the 40°C to +85°C temperature range.
APPLICATIONS
q DATA ACQUISITION SYSTEMS q GENERAL PURPOSE ANALOG BOARDS q MEDICAL INSTRUMENTATION
V+ V
8 6 4 VIN 7 3 1 2 VO = G · VIN
PGA103
VO
GAIN 1 1 10 00
A1 0 1
A0 1 0 0
International Airport Industrial Park · Mailing Address: PO Box 11400 · Tucson, AZ 85734 · Street Address: 6730 S. Tucson Blvd. · Tucson, AZ 85706 Tel: (520) 746-1111 · Twx: 910-952-1111 · Cable: BBRCORP · Telex: 066-6491 · FAX: (520) 889-1510 · Immediate Product Info: (800) 548-6132
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©
1993 Burr-Brown Corporation
PDS-1208B 1
Printed in U.S.A. November, 1993
PGA103
SBOS031
SPECIFICATIONS
ELECTRICAL
TA = +25°C, VS = ±15V, RL = 2k unless otherwise specified. PGA103P, U PARAMETER INPUT Offset Voltage, RTI G=1 G = 10 G = 100 vs Temperature G=1 G = 10 G = 100 vs Power Supply G=1 G = 10 G = 100 Impedance INPUT BIAS CURRENT Initial Bias Current vs Temperature NOISE VOLTAGE, RTI f = 10Hz f = 100Hz f = 1kHz fB = 0.1Hz to 10Hz NOISE CURRENT f = 10Hz f = 1kHz fB = 0.1Hz to 10Hz GAIN Gain Error G=1 G = 10 G = 100 Gain vs Temperature G=1 G = 10 G = 100 Nonlinearity G=1 G = 10 G = 100 OUTPUT Voltage, Positive Negative Load Capacitance, max Short-Circuit Current FREQUENCY RESPONSE Bandwidth, 3dB G=1 G = 10 G = 100 Slew Rate Settling Time, 0.1% G=1 G = 10 G = 100 Settling Time, 0.01% G=1 G = 10 G = 100 Overload Recovery DIGITAL LOGIC INPUTS Digital Low Voltage Digital Low or High Current Digital High Voltage (V+) 3.5 (V) +3.5 G = 100, RS = 0 16 11 11 0.6 2.8 0.3 76 CONDITIONS MIN TYP MAX UNITS
TA = +25°C
±200 ±100 ±100 ±5 ±2 ±2 30 10 10 108 || 2 ±50 ±100
±1500 ±500 ±500
µV µV µV µV/°C µV/°C µV/°C
TA = TMIN to TMAX
VS = ±4.5V to ±18V
70 35 35
µV/V µV/V µV/V || pF nA pA/°C nV/Hz nV/Hz nV/Hz µVp-p pA/Hz pA/Hz pAp-p
±150
±0.005 ±0.02 ±0.04 ±2 ±10 ±30 ±0.001 ±0.002 ±0.004 (V+) 2.5 (V) +2.5 1000 ±25
±0.02 ±0.05 ±0.2
% % % ppm/°C ppm/°C ppm/°C
±0.003 ±0.005 ±0.01
% of FSR % of FSR % of FSR V V pF mA
VO = ±10V
1.5 750 250 9 2 2.2 6.5 2.5 2.5 8 2.5 5.6 1 2 V+ 0.8
MHz kHz kHz V/µs µs µs µs µs µs µs µs V µA V
50% Overdrive
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PGA103
2
SPECIFICATIONS (CONT)
ELECTRICAL
TA = +25°C, VS = ±15V, RL = 2k unless otherwise specified. PGA103P, U PARAMETER POWER SUPPLY Voltage Range Current TEMPERATURE RANGE Specification Operating JA: P or U Package CONDITIONS MIN ±4.5 VIN = 0V 40 40 100 TYP ±15 ±2.6 MAX ±18 ±3.5 +85 +125 UNITS V mA °C °C °C/W
PIN CONFIGURATION
Top View
A0 A1 Ground VIN 1 2 3 4 8 7 6 5 V+ VO V NC
ABSOLUTE MAXIMUM RATINGS
DIP/SO-8 Supply Voltage ......... ±18V Analog Input Voltage Range ..... V to V+ Logic Input Voltage Range ........ V to V+ Output Short Circuit (to ground) ........... Continuous Operating Temperature ...... 40°C to +125°C Storage Temperature .... 40°C to +125°C Junction Temperature .......... +150°C Lead Temperature (soldering,10s) .... +300°C
PACKAGE INFORMATION
MODEL PACKAGE 8-Pin Plastic DIP SO-8 Surface-Mount PACKAGE DRAWING NUMBER(1) 006 182
ORDERING INFORMATION
MODEL PGA103P PGA103U PACKAGE 8-Pin Plastic DIP SO-8 Surface-Mount TEMPERATURE RANGE 40°C to +85°C 40°C to +85°C
PGA103P PGA103U
NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix D of Burr-Brown IC Data Book.
ELECTROSTATIC DISCHARGE SENSITIVITY
Any integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet published specifications.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
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3
PGA103
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PG-1 PG-2
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