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Details, datasheet, quote on part number:SN100KT5574
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| Part: | SN100KT5574 |
| Category: | Logic => Level Translators => Bipolar->ECL 10 Family |
| Description: | Octal Ecl-to-ttl Translator With D-type Edge-triggered Flip-flops And 3-state Outputs |
| Company: | Texas Instruments, Inc. |
| Datasheet: | Download SN100KT5574 datasheet File size : 56 kB |
| Request For quote: | Find where to buy SN100KT5574
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Datasheet text preview:
SN100KT5574 OCTAL ECL-TO-TTL TRANSLATOR WITH D-TYPE EDGE-TRIGGERED FLIP-FLOPS AND 3-STATE OUTPUTS
SDZS009 D3418, JANUARY 1990
· · · · ·
100K Compatible ECL Clock and TTL Control Inputs Flow-Through Architecture Optimizes PCB Layout Center Pin VCC, VEE, and GND Configurations Minimize High-Speed Switching Noise Package Options Include "Small Outline" Packages and Standard Plastic DIPs
DW OR NT PACKAGE (TOP VIEW)
description
This octal ECL-to-TTL translator is designed to 11 14 provide efficient translation between a 100K ECL 12 13 signal environment and a TTL signal environment. This device is designed specifically to improve the performance and density of ECL-to-TTL CPU/bus-oriented functions such as memory-address drivers, clock drivers, and bus-oriented receivers and transmitters. The eight flip-flops of the SN100KT5574 are edge-triggered D-type flip-flops. On the positive transition of the clock, the Q outputs are set to the logic levels that were set up at the D inputs. A buffered output-enable input (OE) can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance third state and increased drive provide the capability to drive bus lines without need for interface or pullup components. The output-enable input OE does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are off. The SN100KT5574 is characterized for operation from 0°C to 85°C.
FUNCTION TABLE INPUTS OE L L L H CLK L X D L H X X OUTPUT (TTL) Q L H Qo Z
1Q 2Q 3Q 4Q VC C GND GND GND 5Q 6Q 7Q 8Q
1 2 3 4 5 6 7 8 9 10
24 23 22 21 20 19 18 17 16 15
1D 2D 3D 4D OE(TTL) VEE GND CLK(ECL) 5D 6D 7D 8D
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright © 1990, Texas Instruments Incorporated
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
1
SN100KT5574 OCTAL ECL-TO-TTL TRANSLATOR WITH D-TYPE EDGE-TRIGGERED FLIP-FLOPS AND 3-STATE OUTPUTS
logic symbol
CLK 17 20 ECL/TTL C1 OE CLK 1 2 3 4 4Q 9 10 11 12 5Q 6Q 7Q 8Q 4D 21 ECL/TTL 3D 22 ECL/TTL
logic diagram (positive logic)
20 17
OE
EN
ECL/TTL C1 1D C1 1 1Q
1D 2D 3D 4D 5D 6D 7D 8D
24 23 22 21 16 15 14 13
1D
ECL/TTL
1Q 2Q 3Q
1D
24
ECL/TTL
2
2D
23
2Q
ECL/TTL
1D C1 1D C1 1D C1 9 4 3
3Q
4Q
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
5D
16
5Q
ECL/TTL
1D C1 1D C1 10 6Q
6D
15
ECL/TTL
11
7D
14
7Q
ECL/TTL
1D C1 12
8D
13
8Q
ECL/TTL
1D
2
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN100KT5574 OCTAL ECL-TO-TTL TRANSLATOR WITH D-TYPE EDGE-TRIGGERED FLIP-FLOPS AND 3-STATE OUTPUTS
absolute maximum ratings over operating temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Supply voltage range, VEE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V to 0 V Input voltage range: TTL (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 V to 7 V ECL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VEE to 0 V Voltage applied to any output in the disabled or power-off state . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 5.5 V Voltage applied to any output in the high state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC Input current range, TTL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA to 5 mA Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 85°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The TTL input voltage ratings may be exceeded provided the input current ratings are observed.
recommended operating conditions
MIN VCC VEE VIH VIL IIK VIH VIL IOH TTL supply voltage ECL supply voltage TTL high-level input voltage TTL low-level input voltage TTL input clamp current ECL high-level input voltage ECL low-level input voltage High-level output current 1150 1810 4.5 4.2 2 0.8 18 840 1490 15 NOM 5 4.5 MAX 5.5 4.8 UNIT V V V V mA mV mV mA
IOL Low-level output current 48 mA TA Operating temperature range 0 85 °C The algebraic convention, in which the least positive (most negative) value is designated minimum, is used in this data sheet for logic levels only.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
3
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