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Details, datasheet, quote on part number:SN54AHCT139FK
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Datasheet text preview:
SN54AHCT139, SN74AHCT139 DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
SCLS267K DECEMBER 1995 REVISED JANUARY 2000
D D D D D D D
EPIC TM (Enhanced-Performance Implanted CMOS) Process Inputs Are TTL-Voltage Compatible Designed Specifically for High-Speed Memory Decoders and Data-Transmission Systems Incorporate Two Enable Inputs to Simplify Cascading and/or Data Reception Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), Thin Very Small-Outline (DGV), Thin Shrink Small-Outline (PW), and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) DIPs
SN54AHCT139 . . . J OR W PACKAGE SN74AHCT139 . . . D, DB, DGV, N, OR PW PACKAGE (TOP VIEW)
1G 1A 1B 1Y0 1Y1 1Y2 1Y3 GND
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
VCC 2G 2A 2B 2Y0 2Y1 2Y2 2Y3
SN54AHCT139 . . . FK PACKAGE (TOP VIEW)
1A 1G NC VCC
description
1B 1Y0 NC 1Y1 1Y2
4 5 6 7 8
3 2 1 20 19 18 17 16 15 14 9 10 11 12 13
2G 2A 2B NC 2Y0 2Y1
The 'AHCT139 devices are dual 2-line to 4-line decoders/demultiplexers designed for 4.5-V to 5.5-V VCC operation. These devices are NC No internal connection designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system decoding. When used with high-speed memories utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoders is negligible. The active-low enable (G) input can be used as a data line in demultiplexing applications. These decoders/demultiplexers feature fully buffered inputs, each of which represents only one normalized load to its driving circuit. The SN54AHCT139 is characterized for operation over the full military temperature range of 55°C to 125°C. The SN74AHCT139 is characterized for operation from 40°C to 85°C.
1Y3 GND NC 2Y3 2Y2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC is a trademark of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303
Copyright © 2000, Texas Instruments Incorporated
· DALLAS, TEXAS 75265
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SN54AHCT139, SN74AHCT139 DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
SCLS267K DECEMBER 1995 REVISED JANUARY 2000
FUNCTION TABLE (each decoder/demultiplexer) INPUTS SELECT G H L L L L B X L L H H A X L H L H Y0 H L H H H OUTPUTS Y1 H H L H H Y2 H H H L H Y3 H H H H L
logic symbols (alternatives)
1A 1B 1G 2 3 1 X/Y 1 2 EN 0 1 2 3 2A 2B 2G 14 13 15 EN 4 5 6 7 12 11 10 9 1Y0 1Y1 1Y2 1Y3 2Y0 2Y1 2Y2 2Y3 2A 2B 2G 14 13 15 EN 1A 1B 1G 2 3 1 DMUX 1 2 EN 0 G 3 0 1 2 3 4 5 6 7 12 11 10 9 1Y0 1Y1 1Y2 1Y3 2Y0 2Y1 2Y2 2Y3
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, DB, DGV, J, N, PW, and W packages.
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN54AHCT139, SN74AHCT139 DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
SCLS267K DECEMBER 1995 REVISED JANUARY 2000
logic diagram (positive logic)
4 1 1G 5 1Y1 1Y0
6 1A Select Inputs 1B 12 2 7
1Y2
3
1Y3 Data Outputs 2Y0
2G
15 11 2Y1 10
2Y2
2A Select Inputs 2B
14 13 9
2Y3
Pin numbers shown are for the D, DB, DGV, J, N, PW, and W packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC + 0.5 V Input clamp current, IIK (VI VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±75 mA Package thermal impedance, JA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82°C/W DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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