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Details, datasheet, quote on part number:SN54ALS857FK
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Datasheet text preview:
SN54ALS857, SN74ALS857 HEX 2-TO-1 UNIVERSAL MULTIPLEXERS WITH 3-STATE OUTPUTS
SDAS170A DECEMBER 1982 REVISED JANUARY 1995
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Select True or Complementary Data Perform AND/NAND (Masking) of A or B Operand Cascadable to Expand Number of Operands Detect Zeros on A or B Operands 3-State Outputs Interface Directly With System Bus Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (NT) and Ceramic (JT) 300-mil DIPs
SN54ALS857 . . . JT PACKAGE SN74ALS857 . . . DW OR NT PACKAGE (TOP VIEW)
description
The ALS857 are hextuple 2-line to 1-line multiplexers with 3-state outputs. The devices can provide either true (COMP low) or inverted (COMP high) data at the Y outputs. In addition, the ALS857 perform the logical AND function (A · B) and the clear function as well. The four modes of operation are:
S0 1A 1B 1Y 2A 2B 2Y 3A 3B 3Y OPER = 0 GND
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
VCC S1 6A 6B 6Y 5A 5B 5Y 4A 4B 4Y COMP
SN54ALS857 . . . FK PACKAGE (TOP VIEW)
· · · ·
Select A-data inputs Select B-data inputs AND A inputs with B inputs Clear
In either of the first two modes, OPER = 0 is high if all the selected A or B inputs are low. The six Y outputs and the OPER = 0 output are all 3-state and rated at 12-mA and 24-mA IOL for the SN54ALS857 and SN74ALS857, respectively. All outputs can be placed in the high-impedance state by applying a high level to the COMP, S0, and S1 inputs simultaneously.
1Y 2A 2B NC 2Y 3A 3B
1B 1A S0 NC VCC S1 6A
4 5 6 7 8 9 10 3 2 1 28 27 26 25 24 23 22 21 20 19 11 12 13 14 15 16 17 18
6B 6Y 5A NC 5B 5Y 4A
NC No internal connection
The SN54ALS857 is characterized for operation over the full military temperature range of 55°C to 125°C. The SN74ALS857 is characterized for operation from 0°C to 70°C.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
3Y OPER = 0 GND NC COMP 4Y 4B
Copyright © 1995, Texas Instruments Incorporated
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SN54ALS857, SN74ALS857 HEX 2-TO-1 UNIVERSAL MULTIPLEXERS WITH 3-STATE OUTPUTS
SDAS170A DECEMBER 1982 REVISED JANUARY 1995
FUNCTION TABLE INPUTS COMP L L L L H H H H S1 L L H H L L H H S0 L H L H L H L H Y A B A·B L A B A·B Z OUTPUTS OPER = 0 H = all A inputs L H = all B inputs L Z L H = all A inputs L H = all B inputs L Z Z
logic symbol
S0 S1 COMP 1 23 13 0 1 N4 3 3 2 1A 2 0 & 1B 2A 2B 3A 3B 4A 4B 5A 5B 6A 6B 3 5 6 8 9 16 15 19 18 22 21 20 6Y 17 5Y 14 4Y 10 3Y 1 7 2Y MUX 2 4 4,5 1Y G 0 3
1 1
EN5 EN6
1
11 3 6
OPER = 0
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the DW, JT, and NT packages.
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN54ALS857, SN74ALS857 HEX 2-TO-1 UNIVERSAL MULTIPLEXERS WITH 3-STATE OUTPUTS
SDAS170A DECEMBER 1982 REVISED JANUARY 1995
logic diagram (positive logic)
S0 1
S1
23
COMP 1A
13 2
4 1B 3
1Y
2A 2B 3A 3B 4A 4B 5A 5B
5 6 8 9 16 15 19 18 Details of Four Identical Channels Not Shown
7 10 14 17
2Y 3Y 4Y 5Y
6A
22
20 6B 21
6Y
11
OPER = 0
Pin numbers shown are for the DW, JT, and NT packages.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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