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Details, datasheet, quote on part number:SN54HC86W
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Datasheet text preview:
SN54HC86, SN74HC86 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES
SCLS100C DECEMBER 1982 REVISED AUGUST 1999
D
Package Options Include Plastic Small-Outline (D) Thin Shrink Small-Outline (PW), and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) DIPs
SN54HC86 . . . J OR W PACKAGE SN74HC86 . . . D, N, OR PW PACKAGE (TOP VIEW)
description
These devices contain four independent 2-input exclusive-OR gates. They perform the Boolean function Y = A B or Y = AB + AB in positive logic. A common application is as a true / complement element. If one of the inputs is low, the other input is reproduced in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the output. The SN54HC86 is characterized for operation over the full military temperature range of 55°C to 125°C. The SN74HC86 is characterized for operation from 40°C to 85°C.
FUNCTION TABLE (each gate) INPUTS A L L H H B L H L H OUTPUT Y L H H L
1A 1B 1Y 2A 2B 2Y GND
1 2 3 4 5 6 7
14 13 12 11 10 9 8
VCC 4B 4A 4Y 3B 3A 3Y
SN54HC86 . . . FK PACKAGE (TOP VIEW)
1B 1A NC VCC 4B 1Y NC 2A NC 2B
4 5 6 7 8 3 2 1 20 19 18 17 16 15 14 9 10 11 12 13
4A NC 4Y NC 3B
NC No internal connection
logic symbol
1A 1B 2A 2B 3A 3B 4A 4B 1 2 4 5 9 10 12 13 11 4Y 8 3Y 6 2Y =1 3 1Y
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, J, N, PW, and W packages.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright © 1999, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
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2Y GND NC 3Y 3A
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SN54HC86, SN74HC86 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES
SCLS100C DECEMBER 1982 REVISED AUGUST 1999
exclusive-OR logic
An exclusive-OR gate has many applications, some of which can be represented better by alternative logic symbols.
Exclusive OR =1
These are five equivalent exclusive-OR symbols valid for an 'HC86 gate in positive logic; negation may be shown at any two ports.
Logic Identity Element = The output is active (low) if all inputs stand at the same logic level (i.e., A = B). Even-Parity Element 2k The output is active (low) if an even number of inputs (i.e., 0 or 2) are active. Odd-Parity Element 2k + 1 The output is active (high) if an odd number of inputs (i.e., only 1 of the 2) are active.
absolute maximum ratings over operating free-air temperature range
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Input clamp current, IIK (VI VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Output clamp current, IOK (VO VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Package thermal impedance, JA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace length of zero.
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN54HC86, SN74HC86 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES
SCLS100C DECEMBER 1982 REVISED AUGUST 1999
recommended operating conditions (see Note 3)
SN54HC86 MIN VCC VIH Supply voltage High-level input voltage VCC = 2 V VCC = 4.5 V VCC = 6 V VCC = 2 V VIL VI VO tt Low-level input voltage Input voltage Output voltage Input transition (rise and fall) time VCC = 2 V VCC = 4.5 V VCC = 4.5 V VCC = 6 V 2 1.5 3.15 4.2 0 0 0 0 0 0 0 0.5 1.35 1.8 VCC VCC 1000 500 NOM 5 MAX 6 SN74HC86 MIN 2 1.5 3.15 4.2 0 0 0 0 0 0 0 0.5 1.35 1.8 VCC VCC 1000 500 ns V V V V NOM 5 MAX 6 UNIT V
VCC = 6 V 0 400 0 400 TA Operating free-air temperature 55 125 40 85 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS CONDITIONS VCC 2V IOH = 20 µA VOH VI = VIH or VIL IOH = 4 mA IOH = 5.2 mA IOL = 20 µA VOL VI = VIH or VIL IOL = 4 mA IOL = 5.2 mA II ICC Ci VI = VCC or 0 VI = VCC or 0, IO = 0 4.5 V 6V 4.5 V 6V 2V 4.5 V 6V 4.5 V 6V 6V 6V 2 V to 6 V 3 MIN 1.9 4.4 5.9 3.98 5.48 TA = 25°C TYP MAX 1.998 4.499 5.999 4.3 5.8 0.002 0.001 0.001 0.17 0.15 ±0.1 0.1 0.1 0.1 0.26 0.26 ±100 2 10 SN54HC86 MIN 1.9 4.4 5.9 3.7 5.2 0.1 0.1 0.1 0.4 0.4 ±1000 40 10 MAX SN74HC86 MIN 1.9 4.4 5.9 3.84 5.34 0.1 0.1 0.1 0.33 0.33 ±1000 20 10 nA µA pF V V MAX UNIT
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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