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Details, datasheet, quote on part number:SN54LVC652AFK
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Datasheet text preview:
SN54LVC652A, SN74LVC652A OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SCAS303H JANUARY 1993 REVISED AUGUST 1998
D D D D D D
EPIC TM (Enhanced-Performance Implanted CMOS) Submicron Process Typical VOLP (Output Ground Bounce) 2 V at VCC = 3.3 V, TA = 25°C Support Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V VCC) ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), Thin Shrink Small-Outline (PW) Packages, and Ceramic Chip Carriers (FK)
SN74LVC652A . . . DB, DW, OR PW PACKAGE (TOP VIEW)
CLKAB SAB OEAB A1 A2 A3 A4 A5 A6 A7 A8 GND
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
VCC CLKBA SBA OEBA B1 B2 B3 B4 B5 B6 B7 B8
SN54LVC652A . . . FK PACKAGE (TOP VIEW)
OEAB SAB CLKAB NC VCC
4
The SN54LVC652A octal bus transceiver and register is designed for 2.7-V to 3.6-V VCC operation, and the SN74LVC652A octal bus transceiver and register is designed for 1.65-V to 3.6-V VCC operation. These devices consist of bus transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers.
A1 A2 A2 NC A4 A5 A6
5 6 7 8 9 10
3 2 1 28 27 26 25 24 23 22 21 20
CLKBA SBA OEBA B1 B2 NC B3 B4 B5
description
Output-enable (OEAB and OEBA) inputs are provided to control the transceiver functions. Select-control (SAB and SBA) inputs are provided to select whether real-time or stored data is NC No internal connection transferred. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. A low input selects real-time data, and a high input selects stored data. Figure 1 illustrates the four fundamental bus-management functions that are performed with the 'LVC652A. Data on the A or B data bus, or both, is stored in the internal D-type flip-flops by low-to-high transitions at the appropriate clock (CLKAB or CLKBA) inputs, regardless of the select- or enable-control pins. When SAB and SBA are in the real-time transfer mode, it is possible to store data without using the internal D-type flip-flops by simultaneously enabling OEAB and OEBA. In this configuration, each output reinforces its input. When all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last state. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.
A7 A8 GND NC B8 B7 B6
19 11 12 13 14 15 16 17 18
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright © 1998, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
1
SN54LVC652A, SN74LVC652A OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SCAS303H JANUARY 1993 REVISED AUGUST 1998
description (continued)
To ensure the high-impedance state during power up or power down, OEBA should be tied to VCC through a pullup resistor and OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver. The SN54LVC652A is characterized for operation over the full military temperature range of 55°C to 125°C. The SN74LVC652A is characterized for operation from 40°C to 85°C.
FUNCTION TABLE INPUTS OEAB L L X H L L L L H H H OEBA H H H H X L L L H H L CLKAB H or L H or L X X X H or L H or L CLKBA H or L H or L X H or L X X H or L SAB X X X X X X X X L H H SBA X X X X X X L H X X H A1A8 Input Input Input Input Unspecified Output Output Output Input Input Output DATA I/O B1B8 Input Input Unspecified Output Input Input Input Input Output Output Output OPERATION OR FUNCTION OR FUNCTION Isolation Store A and B data Store A, hold B Store A in both registers Hold A, store B Store B in both registers Real-time B data to A bus Stored B data to A bus Real-time A data to B bus Stored A data to B bus Stored A data to B bus and stored B data to A bus
The data-output functions can be enabled or disabled by a variety of level combinations at OEAB or OEBA. Data-input functions always are enabled; i.e., data at the bus terminals is stored on every low-to-high transition of the clock inputs. Select control = L; clocks can occur simultaneously. Select control = H; clocks must be staggered to load both registers.
2
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN54LVC652A, SN74LVC652A OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SCAS303H JANUARY 1993 REVISED AUGUST 1998
BUS B
3 21 OEAB OEBA L L
1 23 2 CLKAB CLKBA SAB X X X
22 SBA L
3 21 OEAB OEBA H H
1 CLKAB X
23 CLKBA X
2 SAB L
BUS B 22 SBA X REAL-TIME TRANSFER BUS A TO BUS B 1 CLKAB H or L 23 CLKBA H or L 2 SAB H BUS B 22 SBA H TRANSFER STORED DATA TO A AND/OR B
BUS A
REAL-TIME TRANSFER BUS B TO BUS A
BUS B
BUS A
3 OEAB X L L
21 OEBA H X H
1 X
23 X
2 X X X
22 SBA X X X
3 OEAB H
CLKAB CLKBA SAB
OEBA L
STORAGE FROM A, B, OR A AND B
Figure 1. Bus-Management Functions
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
BUS A 21
BUS A
3
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