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Details, datasheet, quote on part number:SN55LVDS31
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Datasheet text preview:
SN55LVDS31, SN65LVDS31, SN65LVDS3487, SN65LVDS9638 HIGH-SPEED DIFFERENTIAL LINE DRIVERS
SLLS261J JULY 1997 REVISED OCTOBER 2002
D D D D D D D D D D
Meet or Exceed the Requirements of ANSI TIA/EIA-644 Standard Low-Voltage Differential Signaling With Typical Output Voltage of 350 mV and 100- Load Typical Output Voltage Rise and Fall Times of 500 ps (400 Mbps) Typical Propagation Delay Times of 1.7 ns Operate From a Single 3.3-V Supply Power Dissipation 25 mW Typical Per Driver at 200 MHz Driver at High Impedance When Disabled or With VCC = 0 Bus-Terminal ESD Protection Exceeds 8 kV Low-Voltage TTL (LVTTL) Logic Input Levels Pin Compatible With AM26LS31, MC3487, and µA9638
SN55LVDS31 . . . J OR W SN65LVDS31 . . . D OR PW (Marked as LVDS31 or 65LVDS31) (TOP VIEW)
1A 1Y 1Z G 2Z 2Y 2A GND
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
VCC 4A 4Y 4Z G 3Z 3Y 3A
SN55LVDS31FK (TOP VIEW)
V CC 3A
16 15 14 13 12 11 10 9 8 7 6 5
NC
1
1Y
1A
3
2
20 19 18 4Y 17 4Z 16 NC 15 G 14 3Z
1Z G NC 2Z 2Y
4 5 6 7 8 9 10 11 12 13
description
The SN55LVDS31, SN65LVDS31, SN65LVDS3487, and SN65LVDS9638 are differential line drivers that implement the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as TIA/EIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. Any of the four current-mode drivers will deliver a minimum differential output voltage magnitude of 247 mV into a 100- load when enabled. The intended application of these devices and signaling technique is both point-to-point and multidrop (one driver and multiple receivers) data transmission over controlled impedance media of approximately 100 . The transmission media may be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise coupling to the environment. The SN65LVDS31, SN65LVDS3487, and SN65LVDS9638 are characterized for operation from 40°C to 85°C. The SN55LVDS31 is characterized for operation from 55°C to 125°C.
2A
SN65LVDS3487D (Marked as LVDS3487 or 65LVDS3487) (TOP VIEW)
GND
NC
1A 1Y 1Z 1,2EN 2Z 2Y 2A GND
1 2 3 4 5 6 7 8
SN65LVDS9638D (Marked as DK638 or LVDS38) SN65LVDS9638DGN (Marked as L38) SN65LVDS9638DGK (Marked as AXG) (TOP VIEW)
VCC 1A 2A GND
1 2 3 4
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 2002, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
3Y VCC 4A 4Y 4Z 3,4EN 3Z 3Y 3A 1Y 1Z 2Y 2Z
4A
1
SN55LVDS31, SN65LVDS31, SN65LVDS3487, SN65LVDS9638 HIGH-SPEED DIFFERENTIAL LINE DRIVERS
SLLS261J JULY 1997 REVISED OCTOBER 2002
AVAILABLE OPTIONS PACKAGE TA (D) SN65LVDS31D 40°C to 85°C 55°C to 125°C SN65LVDS3487D SN65LVDS9638D -- -- SMALL OUTLINE (PW) SN65LVDS31PW -- -- -- -- MSOP -- -- SN65LVDS9638DGN SN65LVDS9638DGK -- CHIP CARRIER (FK) -- -- -- -- SNJ55LVDS31FK CERAMIC DIP (J) -- -- -- -- SNJ55LVDS31J FLAT PACK (W) -- -- -- -- SNJ55LVDS31W SN55LVDS31W
logic symbol
SN55LVDS31, SN65LVDS31 4 12 1 EN
'LVDS31 logic diagram (positive logic)
G G 1A 2 3 6 5 1Y 1Z 2Y 2Z 3Y 3Z 4Y 4Z 4A 15 3A 2A 4 12 1 2 3 6 5 10 11 14 13
G G
1Y 1Z 2Y 2Z 3Y 3Z 4Y 4Z
1A
1
7
2A
7
9
3A
9
10 11
4A
15
14 13
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic symbol
SN65LVDS3487 1,2EN 4 EN 2 3 6 5
SN65LVDS3487 logic diagram (positive logic)
1A 1Y 1Z 2Y 2Z 3A 10 11 14 13 3Y 3Z 4Y 4Z 4A 3,4EN 9 12 15 14 13 4Y 4Z 10 11 1,2EN 2A 1 4 7 6 5 2Y 2Z 3Y 3Z 2 3 1Y 1Z
1A
1
2A
7
3,4EN
12
EN
3A
9
4A
15
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
2
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN55LVDS31, SN65LVDS31, SN65LVDS3487, SN65LVDS9638 HIGH-SPEED DIFFERENTIAL LINE DRIVERS
SLLS261J JULY 1997 REVISED OCTOBER 2002
logic symbol
SN65LVDS9638 1A 2 8 7 6 5 1Y 1Z 2Y 2Z
SN65LVDS9638 logic diagram (positive logic)
1A 2 8 7 6 5 1Y 1Z 2Y 2Z
2A
3
2A
3
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Function Tables
SN55LVDS31, SN65LVDS31 INPUT A H L H L X Open Open ENABLES G H H X X L H X G X X L L H X L OUTPUTS Y H L H L Z L L Z L H L H Z H H
H = high level, L = low level, X = irrelevant, Z = high impedance (off) SN65LVDS3487 INPUT A H L X Open ENABLE EN H H L H OUTPUTS Y H L Z L Z L H Z H
H = high level, L = low level, X = irrelevant, Z = high impedance (off) SN65LVDS9638 INPUT A H L Open OUTPUTS Y H L L Z L H H
H = high level, L = low level
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
3
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