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Details, datasheet, quote on part number:SN64BCT126A
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Datasheet text preview:
SN64BCT126A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS
SCBS051C AUGUST 1990 REVISED JULY 1998
D D D D D
State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State Outputs Drive Bus Lines or Buffer-Memory Address Registers ESD Protection Exceeds 2000 V Per MIL-STD-883 Method 3015 High-Impedance State During Power Up and Power Down Package Options Include Plastic Small-Outline (D) and Standard Plastic 300-mil DIPs (N)
D OR N PACKAGE (TOP VIEW)
1OE 1A 1Y 2OE 2A 2Y GND
1 2 3 4 5 6 7
14 13 12 11 10 9 8
VC C 4OE 4A 4Y 3OE 3A 3Y
description
The SN64BCT126A bus buffer features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low. The SN64BCT126A is characterized for operation from 40°C to 85°C and 0°C to 70°C.
FUNCTION TABLE (each buffer) INPUTS OE H H L A H L X OUTPUT Y H L Z
logic symbol
1 2 4 5 10 9 13 12 8 3Y
logic diagram (positive logic)
1OE 1A 2OE 2A 3OE 3A 4OE 4A
EN
1
3 6
1Y 2Y
1OE 1A
1 2 3
1Y
4 2OE 2A 5 6 2Y
11
4Y
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
3OE 3A
10 9 8
3Y
4OE 4A
13 12 11
4Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright © 1998, Texas Instruments Incorporated
POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 772511443
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SN64BCT126A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS
SCBS051C AUGUST 1990 REVISED JULY 1998
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Voltage range applied to any output in the disabled or power-off state, VO . . . . . . . . . . . . . . . . 0.5 V to 5.5 V Voltage range applied to any output in the high state, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC Current into any output in the low state, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Package thermal impedance, JA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input negative voltage rating may be exceeded if the input clamp current rating is observed. 2. The package thermal impedance is calculated in acordane with JESD 51, except for through-hole packages, which use a trace length of zero.
recommended operating conditions (see Note 3)
MIN VCC VIH VIL IIK IOH IOL Supply voltage High-level input voltage Low-level input voltage Input clamp current High-level output current Low-level output current 4.5 2 0.8 18 15 64 NOM 5 MAX 5.5 UNIT V V V mA mA mA
TA Operating free-air temperature 40 85 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 772511443
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SN64BCT126A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS
SCBS051C AUGUST 1990 REVISED JULY 1998
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER VIK VOH VOL IOZH IOZL IOZ II IIH IIL IOS ICCL ICCH ICCZ Ci VCC = 4.5 V, VCC = 4 5 V 4.5 VCC = 4.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 0 to 1.3 V (power up) VCC = 1.3 V to 0 (power down) VCC = 0, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V VCC = 5.5 V VCC = 5.5 V VCC = 5 V, VI = 2.5 V or 0.5 V VO = 2.5 V or 0.5 V TEST CONDITIONS II = 18 mA IOH = 3 mA IOH = 15 mA IOH = 64 mA VO = 2.7 V VO = 0.5 V VO = 2 7 V or 0 5 V 2.7 or 0.5 V, VI = 7 V VI = 2.7 V VI = 0.5 V VO = 0 100 35 21 5 4 9 OE at 2 V at MIN 2.4 2 TYP 3.3 3.1 0.42 0.55 50 50 MAX 1.2 UNIT V V V µA µA µA mA µA µA mA mA mA mA pF pF
"50 "50
0.1 25 20 225 51 33 10
Co VCC = 5 V, All typical values are at VCC = 5 V, TA = 25°C. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
switching characteristics (see Figure 1)
VCC = 5 V, CL = 50 pF, R1 = 500 , R2 = 500 500 , TA = 25°C MIN tPLH tPHL tPZH tPZL tPHZ tPLZ A Y Y Y 1.5 2.7 2.6 3.7 3.2 3.4 TYP 3.6 5.3 4.8 6.4 6.6 6.5 MAX 4.9 6.9 6.4 8.3 8.2 8 VCC = 4.5 V to 5.5 V CL = 50 pF, R1 = 500 , R2 = 500 TA = 40 °C to 85°C MIN 1.5 2.7 2.6 3.7 3.2 3.4 MAX 6.3 7.7 7.9 10.5 10 12.3 TA = 0°C to 70°C MIN 1.5 2.7 2.6 3.7 3.2 3.4 MAX 6.3 7.4 7.9 10 10 10.7 ns ns ns
PARAMETER
FROM (INPUT)
TO (OUTPUT)
UNIT
OE OE
POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 772511443
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