|
Details, datasheet, quote on part number:SN65LVDM050
| |
Datasheet text preview:
SN65LVDM179, SN65LVDM180, SN65LVDM050, SN65LVDM051 HIGH-SPEED DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SLLS324F DECEMBER 1998 REVISED MARCH 2003
D Low-Voltage Differential 50- Line Drivers D D D D D D D D D D
and Receivers Typical Signaling Rates of 500 Mbps Bus-Terminal ESD Exceeds 12 kV Operates From a Single 3.3-V Supply Low-Voltage Differential Signaling With Typical Output Voltages of 340 mV With a 50- Load Valid Output With as Little as 50-mV Input Voltage Difference Propagation Delay Times Driver: 1.7 ns Typical Receiver: 3.7 ns Typical Power Dissipation at 200 MHz Driver: 50 mW Typical Receiver: 60 mW Typical LVTTL Input Levels Are 5-V Tolerant Driver Is High Impedance When Disabled or With VCC < 1.5 V Receiver Has Open-Circuit Failsafe The SN65LVDM179, SN65LVDM180, SN65LVDM050, and SN65LVDM051 are differential line drivers and receivers that use low-voltage differential signaling (LVDS) to achieve high signaling rates. These circuits are similar to TIA/EIA-644 standard compliant devices (SN65LVDS) counterparts, except that the output current of the drivers is doubled. This modification provides a minimum differential output voltage magnitude of 247 mV across a 50- load simulating two transmission lines in parallel. This allows having data buses with more than one driver or with two line termination resistors. The receivers detect a voltage difference of 50 mV with up to 1 V of ground potential difference between a transmitter and receiver. The intended application of these devices and signaling techniques is point-to-point half duplex, baseband data transmission over a controlled impedance media of approximately 100 characteristic impedance. The transmission media may be printed-circuit board traces, backplanes, or cables.
SN65LVDM179D (Marked as DM179 or LVM179) SN65LVDM179DGK (Marked as M79) (TOP VIEW)
VCC R D GND
1 2 3 4
8 7 6 5
A B Z Y
3 D 2 R
5 6 8 7
Y Z A B
SN65LVDM180D (Marked as LVDM180) SN65LVDM180PW (Marked as LVDM180) (TOP VIEW)
NC R RE DE D GND GND
1 2 3 4 5 6 7
14 13 12 11 10 9 8
VCC VCC A B Z Y NC
5 D 4 DE RE 2 R 3
9 10
Y Z
12 11
A B
SN65LVDM050D (Marked as LVDM050) SN65LVDM050PW (Marked as LVDM050) (TOP VIEW) 15
14 13
description
1B 1A 1R RE 2R 2A 2B GND
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
VCC 1D 1Y 1Z DE 2Z 2Y 2D
1D 12 DE 9 2D 3 1R 4 RE 5 2R
1Y 1Z 2Y 2Z 1A 1B 2A 2B
10 11 2 1 6 7
SN65LVDM051D (Marked as LVDM051) SN65LVDM051PW (Marked as LVDM051) (TOP VIEW) 15 1D 1B 1 16 VCC 4 1A 2 15 1D 1DE 3 1R 3 14 1Y 1R 1DE 4 13 1Z
14 13 2 1 10 11
1Y 1Z 1A 1B 2Y 2Z 2A 2B
2R 2A 2B GND
5 6 7 8
12 11 10 9
2DE 2Z 2Y 2D
9 2D 12 2DE 5 2R
6 7
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2001 2003 Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
1
SN65LVDM179, SN65LVDM180, SN65LVDM050, SN65LVDM051 HIGH-SPEED DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SLLS324F DECEMBER 1998 REVISED MARCH 2003
description (continued)
The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the environment, and other application-specific characteristics. The SN65LVDM179, SN65LVDM180, SN65LVDM050, and SN65LVDM051 are characterized for operation from 40°C to 85°C.
AVAILABLE OPTIONS PACKAGE TA SMALL OUTLINE (D) SN65LVDM050D 40°C to 85°C to 85°C SN65LVDM051D SN65LVDM179D SN65LVDM180D SMALL OUTLINE (DGK) -- -- SN65LVDM179DGK -- SMALL OUTLINE (PW) SN65LVDM050PW SN65LVDM051PW -- SN65LVDM180PW
Function Tables
SN65LVDM179 RECEIVER INPUTS VID = VA VB VID 50 mV 50 MV < VID < 50 mV VID 50 mV Open OUTPUT R H ? L H
H = high level, L = low level, ? = indeterminate SN65LVDM179 DRIVER INPUT D L H Open OUTPUTS Y L H L Z H L H
H = high level, L = low level SN65LVDM180, SN65LVDM050, and SN65LVDM051 RECEIVER INPUTS VID = VA VB VID 50 mV 50 MV < VID < 50 mV VID 50 mV Open X RE L L L L H OUTPUT R H ? L H Z
H = high level, L = low level, Z = high impedance, X = don't care
Function Tables (Continued)
SN65LVDM180, SN65LVDM050, and SN65LVDM051 DRIVER
2
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN65LVDM179, SN65LVDM180, SN65LVDM050, SN65LVDM051 HIGH-SPEED DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SLLS324F DECEMBER 1998 REVISED MARCH 2003
INPUTS D L H Open X DE H H H L
OUTPUTS Y L H L Z Z H L H Z
H = high level, L = low level, Z = high impedance, X = don't care
equivalent input and output schematic diagrams
VCC VCC VCC 300 k 50 D or RE Input DE Input 7V 300 k 50 7V 10 k 5 Y or Z Output
7V
VCC
VCC
300 k
300 k 5
A Input
B Input 7V 7V 7V
R Output
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
3
|
|
