|Category||Semiconductors => Logic => Buffer/Driver/Transceiver => Inverting Buffer/Driver|
|Part family||SN7406 Hex inverter buffers / drivers with high-voltage outputs|
|Description||Hex inverter buffers / drivers with high-voltage outputs 14-SOIC 0 to 70|
|Company||Texas Instruments, Inc.|
|Datasheet||Download SN7406 datasheet
|Cross ref.||Similar parts: SN74LS05D, SN74LS05DR2, SN74LS05J, SN74LS05JD, SN74LS05JDS, SN74LS05JS, SN74LS05N, SN74LS05ND, SN74LS05NDS, SN74LS05NS|
|Operating Temperature Range(C)||0 to 70|
|tpd @ Nom Voltage(Max)(ns)||23|
|Approx. Price (US$)||0.28 | 1ku|
|Output Drive (IOL/IOH)(Max)(mA)||0/40|
|ICC @ Nom Voltage(Max)(mA)||0.051|
|F @ Nom Voltage(Max)(Mhz)||35|
|Pin nb||Package type||Ind std||JEDEC code||Package qty||Carrier||Device mark||Width (mm)||Length (mm)||Thick (mm)||Pitch (mm)|
|SN7406, SN7416 HEX INVERTER BUFFERS/DRIVERS WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS
Convert TTL Voltage Levels to MOS Levels High Sink-Current Capability Input Clamping Diodes Simplify System Design Open-Collector Drivers for Indicator Lamps and Relays Inputs Fully Compatible With Most TTL Circuitsdescription
These TTL hex inverter buffers/drivers feature high-voltage open-collector outputs for interfacing with high-level circuits (such as MOS) or for driving high-current loads (such as lamps or relays), and also are characterized for use as inverter buffers for driving TTL inputs. The SN5406 and SN7406 have minimum breakdown voltages 30 V. The SN5416 and SN7416 have minimum breakdown voltages 15 V. The maximum sink current 30 mA for the SN5406 and SN5416, and 40 mA for the SN7406 and SN7416.
TA PACKAGE Tube SOIC to 70°C PDIP N SOP NS CDIP to 125°C CDIP W LCCC FK Tape and reel Tube Tape and reel Tube Tape and reel Tube ORDERABLE PART NUMBER SNJ5416W SNJ5406FK TOP-SIDE MARKING SNJ5416W SNJ5406FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.SN7406, SN7416 HEX INVERTER BUFFERS/DRIVERS WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage, VCC (see Note 7 V Input voltage, VI (see Note 5.5 V Output voltage, VO (see Notes 1 and 15 V Package thermal impedance, JA (see Note 3): D package. 86°C/W N package. 80°C/W NS package. 76°C/W Storage temperature range, Tstg. to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. Voltage values are with respect to network ground terminal. 2. This is the maximum voltage which should be applied to any output when is in the off state. 3. The package thermal impedance is calculated in accordance with JESD 51-7.SN7406, SN7416 HEX INVERTER BUFFERS/DRIVERS WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS
SN5406 SN5416 MIN VCC VIH VIL VOH IOL TA Supply voltage High-level input voltage Low-level input voltage High level output voltage High-level Low-level output current Operating free-air temperature NOM 5 MAX 5.5 MIN SN7406 SN7416 NOM 5 MAX mA °C UNIT
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER VIK IOH VOL II IIH IIL ICCH VCC = MIN, VCC = MIN, VCC = MIN MIN, VCC = MAX, VCC = MAX, VCC = MAX, VCC = MAX TEST CONDITIONS MIN 12 mA VIL 0.8 V, VIH 5.5 V VIH 2.4 V VIL V 30 VOH = § IOL 16 mA IOL SN5406 SN5416 TYP MAX MIN SN7406 SN7416 TYP MAX µA mA UNIT
ICCL VCC = MAX 51 32 For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. All typical values are at VCC 25°C. § VOH 30 V for '06 and 15 V for '16. ¶ IOL 30 mA for SN54' and 40 mA for SN74'.
PARAMETER tPLH tPHL FROM (INPUT) A TO (OUTPUT) Y TEST CONDITIONS 15 pF MIN TYP 10 15 MAX 15 23 UNIT ns
|Some Part number from the same manufacture Texas Instruments, Inc.|
|SN7406D ti SN7406, Hex Inverter Buffers / Drivers With High-voltage Outputs|
|SN7407 Hex Buffer/driver With Open-collector High-voltage Outputs|
|SN7407D ti SN7407, Hex Buffers/drivers With Open-collector High-voltage Outputs|
|SN7408 Quadruple 2-input Positive-and Gates|
|SN7408N ti SN7408, Quad 2-input Positive-and Gates|
|SN7409 Quadruple 2-input Positive-and Gates With Open-collector Outputs|
|SN7409N ti SN7409, Quad 2-input Positive-and Gates With Open Collector Outputs|
|SN7410 Triple 3-input NAND Gate|
|SN74107 Dual J-k M/s Flip-flop With Clear|
|SN74107D Dual J-k Flip-flops With Clear|
|SN74107N ti SN74107, Dual J-k Flip-flops With Clear|
|SN74109 Dual J-k Positive-edge-triggered Flip-flops With Preset And Clear|
|SN74109N ti SN74109, Dual J-/k Positive-edge-triggered Flip-flops With Clear And Preset|
|SN7410N ti SN7410, Triple 3-input Positive-nand Gates|
|SN74111 Dual J-k Master-slave Flip-flops With Data Lockout|
|SN74111N ti SN74111, Dual J-k Positive-edge-triggered Flip-flops With Clear And Preset|
|SN74116N ti SN74116, Dual 4-bit D-type Latches With Clear|
|SN7412 Triple 3-input Positive-nand Gates With Open-collector Outputs|
|SN74120 Dual Pulse Synchronizers/drivers|
|SN74120N ti SN74120, Dual Pulse Synchronizers/drivers|
|SN74121 Monostable Multivibrator With Schmitt-trigger Inputs|
100304 : Bipolar->ECL 100 Family. Low Power Quint And/nand Gate. The 100304 is monolithic quint AND/NAND gate. The Function output is the wire-NOR of all five AND gate outputs. All inputs have 50 k pull-down resistors. s Low Power Operation s 2000V ESD protection s Pin/function compatible with 100104 s Voltage compensated operating range -5.7V s Available to industrial grade temperature range (PLCC package only).
5962-8757702RA : CMOS Octal Inverting Bus Transceiver. The Intersil is a high performance CMOS Octal Transceiver manufactured using a self-aligned silicon gate CMOS process (Scaled SAJI IV). The 82C87H provides a full eight-bit bi-directional bus interface a 20 pin package. The Transmit (T) control determines the data direction. The active low output enable (OE) permits simple interface to the 80C86, 80C88.
5962-87614012A : ti SN54AC32, Quadruple 2-Input Positive-OR GATE. OR W PACKAGE SN74AC32. D, DB, N, NS, OR PW PACKAGE (TOP VIEW) SN54AC32. FK PACKAGE (TOP VIEW) The 'AC32 devices are quadruple 2-input positive-OR gates. The devices perform the Boolean function B in positive logic. ORDERING INFORMATION TA PDIP - N SOIC to 85°C SOP - NS SSOP - DB TSSOP - PW CDIP to 125°C CFP - W LCCC - FK PACKAGE Tube Tape and reel Tape.
CS82C83H : CMOS Octal Latching Inverting Bus Driver. The Intersil is a high performance CMOS Octal Latching Buffer manufactured using a self-aligned silicon gate CMOS process (Scaled SAJI IV). The 82C83H provides an 8bit parallel latch/buffer a 20 lead pin package. The active high strobe (STB) input allows transparent transfer of data and latches data on the negative transition of this signal. The active.
M66307FP : Line Scan Buffer With 16-bit Mpu Bus Compatible Inputs. LINE SCAN BUFFER with 16BIT MPU BUS COMPATIBLE INPUTS LINE SCAN BUFFER with 16-BIT MPU BUS COMPATIBLE INPUTS MITSUBISHI DIGITAL ASSP MITSUBISHI DIGITAL ASSP The is an integrated circuit consisting of a line buffer with static memory, manufactured by the silicon gate CMOS process, which satisfies A3-paper 400DPI requirements. It converts the stored data.
MC14572UBCP : Hex Gate , Package: Pdip, Pins=16. The MC14572UB hex functional gate is constructed with MOS Pchannel and Nchannel enhancement mode devices in a single monolithic structure. These complementary MOS logic gates find primary use where low power dissipation and/or high noise immunity is desired. The chip contains four inverters, one NOR gate and one NAND gate. PDIP16 P SUFFIX CASE 648 MC14572UBCP.
MC54HC367J : Hex 3-state Noninverting Buffer With Separate 2-bit And 4-bit Sections.
SN54ABT16623 : Bus Oriented Circuits. 16-bit Bus Transceivers With 3-state Outputs. Members of the Texas Instruments WidebusTM Family State-of-the-Art EPIC-B TM BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce) V at VCC = 25°C Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise Flow-Through Architecture.
SN54LS368J : 3-state Hex Buffers. These devices are high speed hex buffers with 3-state outputs. They are organized as single / 4-bit, with inverting or non-inverting data (D) paths. The outputs are designed to drive 15 TTL Unit Loads or 60 Low Power Schottky loads when the Enable (E) is LOW. When the Output Enable (E) is HIGH, the outputs are forced to a high impedance "off" state.
SN54LS648 : Octal Bus Transceivers And Registers.
SN74AHCT16540DGG : 16-bit Buffers/drivers With 3-state Outputs. Members of the Texas Instruments Widebus TM Family EPIC TM (Enhanced-Performance Implanted CMOS) Process Inputs Are TTL-Voltage Compatible Distributed VCC and GND Pins Minimize High-Speed Switching Noise Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds 2000 V Per MIL-STD-883, Method.
SN74HC166D : ti SN74HC166, 8-Bit Parallel-load Shift Registers. Wide Operating Voltage Range 6 V Outputs Can Drive To 10 LSTTL Loads Low Power Consumption, 80-µA Max ICC Typical tpd ns ±4-mA Output Drive 5 V Low Input Current 1 µA Max Synchronous Load Direct Overriding Clear Parallel-to-Serial Conversion TA PDIP - N PACKAGE Tube of 25 Tube of 40 SOIC to 85°C SOP - NS SSOP - DB Reel of 2500 Reel of 250 Reel of 2000.
SN74HC7032D : ti SN74HC7032, Quadruple Positive-OR GATEs With Schmitt-trigger Inputs.
SN74LV164D : ti SN74LV164, 8-Bit Parallel-out Serial Shift Register. EPIC TM (Enhanced-Performance Implanted CMOS) 2-µ Process Typical VOLP (Output Ground Bounce) V at VCC, = 25°C Typical VOHV (Output VOH Undershoot) V at VCC, = 25°C ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model = 200 pF, = 0) Latch-Up Performance Exceeds 250 mA Per JEDEC Standard JESD-17 Package Options.
TC4S01F : 4000-series Equiv. (TC4Sxx, TC4Wxx). Function = Nor ;; Package = SMV.
A2F200M3C-1FG484 : FPGA, 4608 CLBS, 200000 GATES, PBGA484. s: System Gates: 200000 ; Logic Cells / Logic Blocks: 4608 ; Package Type: Other, 1 MM PITCH, FBGA-484 ; Logic Family: CMOS ; Pins: 484 ; Operating Temperature: 0 to 85 C (32 to 185 F) ; Supply Voltage: 1.5V.
SN74LV221ANSE4 : LV/LV-A/LVX/H SERIES, DUAL MONOSTABLE MULTIVIBRATOR, PDSO16. s: Supply Voltage: 2.5V ; : Complementary Output ; Package Type: Other, PLASTIC, SO-16 ; Logic Family: CMOS ; Number of Pins: 16 ; Propagation Delay: 42 ns ; Operating Temperature: -40 to 85 C (-40 to 185 F).