|
Details, datasheet, quote on part number:SN74ABT543
| |
Datasheet text preview:
SN54ABT543, SN74ABT543 OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
SCBS157A JANUARY 1991 REVISED JULY 1994
· · · · · ·
State-of-the-Art EPIC-BTM BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C High-Drive Outputs ( 32-mA IOH, 64-mA IOL ) Package Options Include Plastic Small-Outline (DW) and Shrink Small-Outline (DB) Packages, Ceramic Chip Carriers (FK), and Plastic (NT) and Ceramic (JT) DIPs
SN54ABT543 . . . JT PACKAGE SN74ABT543 . . . DB, DW, OR NT PACKAGE (TOP VIEW)
LEBA OEBA A1 A2 A3 A4 A5 A6 A7 A8 CEAB GND
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
VCC CEBA B1 B2 B3 B4 B5 B6 B7 B8 LEAB OEAB
SN54ABT543 . . . FK PACKAGE (TOP VIEW)
A1 OEBA LEBA NC VCC
4
The ABT543 octal transceivers contain two sets of D-type latches for temporary storage of data flowing in either direction. Separate latch-enable (LEAB or LEBA) and output-enable (OEAB or OEBA) inputs are provided for each register to permit independent control in either direction of data flow. The A-to-B enable (CEAB) input must be low in order to enter data from A or to output data from B. If CEAB is low and LEAB is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB puts the A latches in the storage mode. With CEAB and OEAB both low, the 3-state B outputs are active and reflect the data present at the output of the A latches. Data flow from B to A is similar but requires using the CEBA, LEBA, and OEBA inputs.
A2 A3 A4 NC A5 A6 A7
5 6 7 8 9 10
3 2 1 28 27 26 25 24 23 22 21 20
CEBA B1 B2 B3 B4 NC B5 B6 B7
description
19 11 12 13 14 15 16 17 18
NC No internal connection
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN74ABT543 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area. The SN54ABT543 is characterized for operation over the full military temperature range of 55°C to 125°C. The SN74ABT543 is characterized for operation from 40°C to 85°C.
EPIC-B is a trademark of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
A8 CEAB GND NC OEAB LEAB B8
Copyright © 1994, Texas Instruments Incorporated
21
SN54ABT543, SN74ABT543 OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
SCBS157A JANUARY 1991 REVISED JULY 1994
FUNCTION TABLE INPUTS CEAB H X L L L LEAB X X H L L OEAB X H L L L A X X X L H OUTPUT B Z Z B0 L
H A-to-B data flow is shown; B-to-A flow control is the same except that it uses CEBA, LEBA, and OEBA. Output level before the indicated steady-state input conditions were established.
logic symbol§
2 OEBA 23 CEBA 1 LEBA 13 OEAB 11 CEAB 14 LEAB A1 3 3 4 5 6 7 8 9 10 6D 1 1 1EN3 G1 1C5 2EN4 G2 2C6 5D 4 22 B1
A2 A3 A4 A5 A6 A7 A8
21 20 19 18 17 16 15
B2 B3 B4 B5 B6 B7 B8
§ This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the DB, DW, JT, and NT packages.
22
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN54ABT543, SN74ABT543 OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
SCBS157A JANUARY 1991 REVISED JULY 1994
logic diagram (positive logic)
OEBA CEBA LEBA OEAB CEAB LEAB A1 2 23 1 13 11 14 3 C1 1D 22 B1
C1 1D
To Seven Other Channels Pin numbers shown are for the DB, DW, JT, and NT packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Input voltage range, VI (except I/O ports) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Voltage range applied to any output in the high state or power-off state, VO . . . . . . . . . . . . . 0.5 V to 5.5 V Current into any output in the low state, IO: SN54ABT543 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA SN74ABT543 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Maximum power dissipation at TA = 55°C (in still air) (see Note 2): DB package . . . . . . . . . . . . . . . . . . . 0.65 W DW package . . . . . . . . . . . . . . . . . . . 1.7 W NT package . . . . . . . . . . . . . . . . . . . . 1.3 W Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils, except for the NT package, which has a trace length of zero. For more information, refer to the Package Thermal Considerations application note in the 1994 ABT Advanced BiCMOS Technology Data Book, literature number SCBD002B.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
23
|
|
