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Details, datasheet, quote on part number:SN74ABT573ARGYR
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Datasheet text preview:
SN54ABT573, SN74ABT573A OCTAL TRANSPARENT D TYPE LATCHES WITH 3 STATE OUTPUTS
SCBS190F - JANUARY 1991 - REVISED SEPTEMBER 2003
D Typical VOLP (Output Ground Bounce) D D
<1 V at VCC = 5 V, TA = 25°C High-Drive Outputs (-32-mA IOH, 64-mA IOL) Ioff Supports Partial-Power-Down Mode Operation
SN54ABT573 . . . J OR W PACKAGE SN74ABT573A . . . DB, DW, N, NS, OR PW PACKAGE (TOP VIEW)
D Latch-Up Performance Exceeds 500 mA Per D
JEDEC Standard JESD 17 ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A)
SN54ABT573 . . . FK PACKAGE (TOP VIEW)
SN74ABT573A . . . RGY PACKAGE (TOP VIEW)
VCC
2D 1D OE VCC
19 1Q 18 2Q 17 3Q 16 4Q 15 5Q 14 6Q 13 7Q 12 8Q
OE
OE 1D 2D 3D 4D 5D 6D 7D 8D GND
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
VCC 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q LE
1
20
9 10 11
description/ordering information
These 8-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. ORDERING INFORMATION
TA PDIP - N QFN - RGY SOIC - DW -40°C to 85°C SOP - NS SSOP - DB TSSOP - PW VFBGA - GQN VFBGA - ZQN (Pb-free) CDIP - J -55°C to 125 C 125°C CFP - W Tape and reel Tube Tube PACKAGE Tube Tape and reel Tube Tape and reel Tape and reel Tape and reel Tube Tape and reel ORDERABLE PART NUMBER SN74ABT573AN SN74ABT573ARGYR SN74ABT573ADW SN74ABT573ADWR SN74ABT573ANSR SN74ABT573ADBR SN74ABT573APW SN74ABT573APWR SN74ABT573AGQNR SN74ABT573AZQNR SNJ54ABT573J SNJ54ABT573W AB573A SNJ54ABT573J SNJ54ABT573W AB573A ABT573A ABT573A AB573A TOP-SIDE MARKING SN74ABT573AN AB573A
LCCC - FK Tube SNJ54ABT573FK SNJ54ABT573FK Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
GND
LE
On products compliant to MIL PRF 38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
Copyright 2003, Texas Instruments Incorporated
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
8D GND LE 8Q 7Q
1D 2D 3D 4D 5D 6D 7D 8D
2 3 4 5 6 7 8
3D 4D 5D 6D 7D
4 5 6 7 8
3 2 1 20 19 18 17 16 15 14 9 10 11 12 13
1Q 2Q 3Q 4Q 5Q 6Q
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SCBS190F - JANUARY 1991 - REVISED SEPTEMBER 2003
SN54ABT573, SN74ABT573A OCTAL TRANSPARENT D TYPE LATCHES WITH 3 STATE OUTPUTS
description/ordering information (continued)
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
SN74ABT573A . . . GQN OR ZQN PACKAGE (TOP VIEW) 1 A B C D E 2 3 4 A B C D E
terminal assignments
1 1D 3D 5D 7D GND 2 OE 3Q 4D 7Q 8D 3 VCC 2D 5Q 6D LE 4 1Q 2Q 4Q 6Q 8Q
FUNCTION TABLE (each latch) INPUTS OE L L L H LE H H L X D H L X X OUTPUT Q H L Q0 Z
logic diagram (positive logic)
OE 1
LE
11 C1 19
1D
2
1D
1Q
To Seven Other Channels Pin numbers shown are for the DB, DW, FK, J, N, NS, PW, RGY, and W packages.
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN54ABT573, SN74ABT573A OCTAL TRANSPARENT D TYPE LATCHES WITH 3 STATE OUTPUTS
SCBS190F - JANUARY 1991 - REVISED SEPTEMBER 2003
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Voltage range applied to any output in the high or power-off state, VO . . . . . . . . . . . . . . . . . . . -0.5 V to 5.5 V Current into any output in the low state, IO: SN54ABT573 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA SN74ABT573A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -18 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Package thermal impedance, JA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W (see Note 2): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W (see Note 2): GQN/ZQN package . . . . . . . . . . . . . . . . . . . . . . . . . . . 78°C/W (see Note 2): N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W (see Note 2): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W (see Note 2): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W (see Note 3): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. 3. The package thermal impedance is calculated in accordance with JESD 51-5.
recommended operating conditions (see Note 4)
SN54ABT573 MIN VCC VIH VIL VI IOH IOL t/v Supply voltage High-level input voltage Low-level input voltage Input voltage High-level output current Low-level output current Input transition rise or fall rate Outputs enabled 0 4.5 2 0.8 VCC -24 48 5 0 MAX 5.5 SN74ABT573A MIN 4.5 2 0.8 VCC -32 64 5 MAX 5.5 UNIT V V V V mA mA ns/V
TA Operating free-air temperature -55 125 -40 85 °C NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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