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Details, datasheet, quote on part number:SN74ABT8245DW
 
 
Part:SN74ABT8245DW
Category:Logic => Boundary Scan (JTAG) Logic
Description:ti SN74ABT8245, Scan Test Devices With Octal Bus Transceivers
Company:Texas Instruments, Inc.
Datasheet:Download SN74ABT8245DW datasheet   File size : 350 kB
Request For quote:  Find where to buy SN74ABT8245DW
 



Datasheet text preview:
SN54ABT8245, SN74ABT8245 SCAN TEST DEVICES WITH OCTAL BUS TRANSCEIVERS
SCBS124D ­ AUGUST 1992 ­ REVISED DECEMBER 1996
D D D D
D D
description
The 'ABT8245 scan test devices with octal bus transceivers are members of the Texas Instruments SCOPE TM testability integrated-circuit family. This family of devices supports IEEE Standard 1149.1-1990 boundary scan to facilitate testing of complex circuit-board assemblies. Scan access to the test circuitry is accomplished via the 4-wire test access port (TAP) interface.
A2 A1 OE NC DIR B1 B2
5 6 7 8 9
A3 A4 A5 NC V CC A6 A7
4 3 2 1 28 27 26 25 24 23 22 21 10 20 11 19 12 13 14 15 16 17 18
D
Members of the Texas Instruments SCOPE TM Family of Testability Products Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture Functionally Equivalent to 'F245 and 'ABT245 in the Normal-Function Mode SCOPE TM Instruction Set: ­ IEEE Standard 1149.1-1990 Required Instructions, Optional INTEST, CLAMP, and HIGHZ ­ Parallel-Signature Analysis at Inputs With Masking Option ­ Pseudo-Random Pattern Generation From Outputs ­ Sample Inputs/Toggle Outputs ­ Binary Count From Outputs ­ Even-Parity Opcodes Two Boundary-Scan Cells per I/O for Greater Flexibility State-of-the-Art EPIC-BTM BiCMOS Design Significantly Reduces Power Dissipation Package Options Include Plastic Small-Outline Packages (DW), Ceramic Chip Carriers(FK), and Standard Ceramic DIPs (JT)
SN54ABT8245 . . . JT PACKAGE SN74ABT8245 . . . DW PACKAGE (TOP VIEW)
DIR B1 B2 B3 B4 GND B5 B6 B7 B8 TDO TMS
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
OE A1 A2 A3 A4 A5 VCC A6 A7 A8 TDI TCK
SN54ABT8245 . . . FK PACKAGE (TOP VIEW)
A8 TDI TCK NC TMS TDO B8
NC ­ No internal connection
In the normal mode, these devices are functionally equivalent to the 'F245 and 'ABT245 octal bus transceivers. The test circuitry can be activated by the TAP to take snapshot samples of the data appearing at the device pins or to perform a self test on the boundary-test cells. Activating the TAP in normal mode does not affect the functional operation of the SCOPE TM octal bus transceivers. Data flow is controlled by the direction-control (DIR) and output-enable (OE) inputs. Data transmission is allowed from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at DIR. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. SCOPE and EPIC-B are trademarks of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
B3 B4 GND NC B5 B6 B7
Copyright © 1996, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
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SN54ABT8245, SN74ABT8245 SCAN TEST DEVICES WITH OCTAL BUS TRANSCEIVERS
SCBS124D ­ AUGUST 1992 ­ REVISED DECEMBER 1996
description (continued)
In the test mode, the normal operation of the SCOPE TM bus transceivers is inhibited and the test circuitry is enabled to observe and control the I/O boundary of the device. When enabled, the test circuitry can perform boundary-scan test operations as described in IEEE Standard 1149.1-1990. Four dedicated test pins control the operation of the test circuitry: test data input (TDI), test data output (TDO), test mode select (TMS), and test clock (TCK). Additionally, the test circuitry performs other testing functions such as parallel-signature analysis (PSA) on data inputs and pseudo-random pattern generation (PRPG) from data outputs. All testing and scan operations are synchronized to the TAP interface. The SN54ABT8245 is characterized for operation over the full military temperature range of ­ 55°C to 125°C. The SN74ABT8245 is characterized for operation from ­ 40°C to 85°C.
FUNCTION TABLE (normal mode) INPUTS OE L L H DIR L H X OPERATION B data to A bus A data to B bus Isolation
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN54ABT8245, SN74ABT8245 SCAN TEST DEVICES WITH OCTAL BUS TRANSCEIVERS
SCBS124D ­ AUGUST 1992 ­ REVISED DECEMBER 1996
functional block diagram
Boundary-Scan Register 24
OE
DIR
1
A1
23
2
B1
One of Eight Channels
Bypass Register
Boundary-Control Register VCC TDI 14 Instruction Register 11 TDO
VCC TMS 12 TAP Controller
TCK
13
Pin numbers shown are for the DW and JT packages.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
3