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Part: SN74AHC4066DR
Category:
Logic
-> Switches
-> Analog Switches
Description: ti SN74AHC4066, Quadruple Bilateral Analog Switch
Company: Texas Instruments, Inc.
Datasheet: Download SN74AHC4066DR datasheet File size : 214 kB
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Datasheet text preview:
SN74AHC4066 QUADRUPLE BILATERAL ANALOG SWITCH
SCLS511 JUNE 2003
D D D D D D D
2-V to 5.5-V VCC Operation Supports Mixed-Mode Voltage Operation on All Ports High On-Off Output-Voltage Ratio Low Crosstalk Between Switches Individual Switch Controls Extremely Low Input Current ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)
D, DB, DGV, N, NS, OR PW PACKAGE (TOP VIEW)
1A 1B 2B 2A 2C 3C GND
1 2 3 4 5 6 7
14 13 12 11 10 9 8
VCC 1C 4C 4A 4B 3B 3A
RGY PACKAGE (TOP VIEW)
This quadruple silicon-gate CMOS analog switch is designed for 2-V to 5.5-V VCC operation. This switch is designed to handle both analog and digital signals. Each switch permits signals with amplitudes up to 5.5 V (peak) to be transmitted in either direction. Each switch section has its own enable-input control (C). A high-level voltage applied to C turns on the associated switch section. Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems. ORDERING INFORMATION
TA PDIP N QFN RGY SOIC D SOP NS SSOP DB TSSOP PW PACKAGE Tube Tape and reel Tube Tape and reel Tube Tape and reel Tube Tape and reel Tube Tape and reel
1
14 13 1C 12 4C 11 4A 10 4B 9 3B
1B 2B 2A 2C 3C
2 3 4 5 6 7 8
NC No internal connection
ORDERABLE PART NUMBER SN74AHC4066N SN74AHC4066RGYR SN74AHC4066D SN74AHC4066DR SN74AHC4066NS SN74AHC4066NSR SN74AHC4066DB SN74AHC4066DBR SN74AHC4066PW SN74AHC4066PWR
GND
TOP-SIDE MARKING SN74AHC4066N HA4066 AHC4066 AHC4066 HA4066 HA4066
40°C to 85 C 85°C
TVSOP DGV Tape and reel SN74AHC4066DGVR HA4066 Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
3A
VCC
description/ordering information
1A
1
SN74AHC4066 QUADRUPLE BILATERAL ANALOG SWITCH
SCLS511 JUNE 2003
FUNCTION TABLE (each switch) INPUT CONTROL (C) L H SWITCH OFF ON
logic diagram (positive logic)
A VCC VCC
B C
One of Four Switches
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Switch I/O voltage range, VIO (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC + 0.5 V Control-input clamp current, IIK (VI VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA On-state switch current, IT (VIO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Package thermal impedance, JA (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W (see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W (see Note 3): DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W (see Note 3): N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W (see Note 3): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W (see Note 3): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W (see Note 4): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. This value is limited to 5.5 V maximum. 3. The package thermal impedance is calculated in accordance with JESD 51-7. 4. The package thermal impedance is calculated in accordance with JESD 51-5.
2
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN74AHC4066 QUADRUPLE BILATERAL ANALOG SWITCH
SCLS511 JUNE 2003
recommended operating conditions (see Note 5)
VCC Supply voltage VCC = 2 V VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V VCC = 2 V VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V 0 0 VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V MIN 2 1.5 VCC × 0.7 VCC × 0.7 VCC × 0.7 0.5 VCC × 0.3 VCC × 0.3 VCC × 0.3 5.5 VCC 200 100 20 V V MAX 5.5 UNIT V
VIH
High-level input voltage, control inputs
VIL
Low-level input voltage, control inputs
VI VIO t/v
Control input voltage Input/output voltage Input transition rise or fall rate
V V ns/V
TA Operating free-air temperature 40 85 °C With supply voltages at or near 2 V, the analog switch on-state resistance becomes very nonlinear. Only digital signals should be transmitted at these low supply voltages. NOTE 5: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
3
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