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Part: SN74AHC540DWR

Category:
 Logic
   -> Buffers/Drivers
             -> Inverting Buffers and Drivers

Description: ti SN74AHC540, Octal Buffers/drivers With 3-State Outputs

Company: Texas Instruments, Inc.

Datasheet: Download SN74AHC540DWR datasheet     File size : 214 kB

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Datasheet text preview:
SN54AHC540, SN74AHC540 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SCLS260J ­ DECEMBER 1995 ­ REVISED JULY 2003
D D
Operating Range 2-V to 5.5-V VCC Latch-Up Performance Exceeds 250 mA Per JESD 17
SN54AHC540 . . . J OR W PACKAGE SN74AHC540 . . . DB, DGV, DW, N, NS, OR PW PACKAGE (TOP VIEW)
description/ordering information
The 'AHC540 octal buffers/drivers are ideal for driving bus lines or buffer memory address registers. These devices feature inputs and outputs on opposite sides of the package to facilitate printed circuit board layout. The 3-state control gate is a two-input AND gate with active-low inputs so that, if either output-enable (OE1 or OE2) input is high, all corresponding outputs are in the high-impedance state. The outputs provide inverted data when they are not in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
OE1 A1 A2 A3 A4 A5 A6 A7 A8 GND
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
VCC OE2 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8
SN54AHC540 . . . FK PACKAGE (TOP VIEW)
A2 A1 OE1 VCC
A3 A4 A5 A6 A7
4 5 6 7 8
3 2 1 20 19 18 17 16 15 14 9 10 11 12 13
OE2 Y1 Y2 Y3 Y4 Y5
ORDERING INFORMATION
TA PDIP ­ N SOIC ­ DW DW ­40°C to 85°C to 85°C SOP ­ NS SSOP ­ DB TSSOP ­ PW PW TVSOP ­ DGV CDIP ­ J ­55°C to 125°C CFP ­ W LCCC ­ FK PACKAGE Tube Tube Tape and reel Tape and reel Tape and reel Tube Tape and reel Tape and reel Tube Tube Tube ORDERABLE PART NUMBER SN74AHC540N SN74AHC540DW SN74AHC540DWR SN74AHC540NSR SN74AHC540DBR SN74AHC540PW SN74AHC540PWR SN74AHC540DGVR SNJ54AHC540J SNJ54AHC540W SNJ54AHC540FK AHC540 HA540 HA540 HA540 SNJ54AHC540J SNJ54AHC540W SNJ54AHC540FK TOP-SIDE MARKING SN74AHC540N AHC540
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
A8 GND Y8 Y7 Y6
1
SN54AHC540, SN74AHC540 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SCLS260J ­ DECEMBER 1995 ­ REVISED JULY 2003
FUNCTION TABLE (each buffer/driver) INPUTS OE1 L L H X OE2 L L X H A L H X X OUTPUT Y H L Z Z
logic diagram (positive logic)
OE1 OE2 1 19
A1
2
18
Y1
To Seven Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­0.5 V to 7 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­0.5 V to VCC + 0.5 V Input clamp current, IIK (VI VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±75 mA Package thermal impedance, JA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92°C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7.
2
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN54AHC540, SN74AHC540 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SCLS260J ­ DECEMBER 1995 ­ REVISED JULY 2003
recommended operating conditions (see Note 3)
SN54AHC540 MIN VCC VIH Supply voltage High-level input voltage VCC = 2 V VCC = 3 V VCC = 5.5 V VCC = 2 V VIL VI VO IOH Low-level input voltage Input voltage Output voltage High-level output current VCC = 2 V VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V VCC = 2 V IOL Low-level output current VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V VCC = 3 V VCC = 5.5 V 0 0 2 1.5 2.1 3.85 0.5 0.9 1.65 5.5 VCC ­50 ­4 ­8 50 4 8 100 20 0 0 MAX 5.5 SN74AHC540 MIN 2 1.5 2.1 3.85 0.5 0.9 1.65 5.5 VCC ­50 ­4 ­8 50 4 8 100 20 V V V V MAX 5.5 UNIT V
mA
mA
mA
mA ns/V
t/v
Input transition rise or fall rate transition rise or fall rate
TA Operating free-air temperature ­55 125 ­40 85 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS CONDITIONS VCC 2V IOH = ­50 mA VOH IOH = ­4 mA IOH = ­8 mA IOL = 50 mA VOL IOL = 4 mA II IOZ ICC Ci Co IOL = 8 mA VI = 5.5 V or GND VO = VCC or GND, VI (OE) = VIL or VIH VI = VCC or GND, VI = VCC or GND IO = 0 3V 4.5 V 3V 4.5 V 2V 3V 4.5 V 3V 4.5 V 0 V to 5.5 V 5.5 V 5.5 V 5V 2 MIN 1.9 2.9 4.4 2.58 3.94 0.1 0.1 0.1 0.36 0.36 ±0.1 ±0.25 4 10 TA = 25°C TYP MAX 2 3 4.5 SN54AHC540 MIN 1.9 2.9 4.4 2.48 3.8 0.1 0.1 0.1 0.5 0.5 ±1* ±2.5 40 MAX SN74AHC540 MIN 1.9 2.9 4.4 2.48 3.8 0.1 0.1 0.1 0.44 0.44 ±1 ±2.5 40 10 V V MAX UNIT
mA mA mA
pF pF
VO = VCC or GND 5V 4 * On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V. For I/O pins, the parameter IOZ includes the input leakage current.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
3


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