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Details, datasheet, quote on part number:SN74AHCT1G126DCK
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Datasheet text preview:
SN74AHCT1G126 SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT
SCLS380F AUGUST 1997 REVISED JANUARY 2000
D D D D D
EPIC TM (Enhanced-Performance Implanted CMOS) Process Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Package Options Include Plastic Small-Outline Transistor (DBV, DCK) Packages
DBV OR DCK PACKAGE (TOP VIEW)
OE A GND
1 2 3
5 4
VCC Y
description
The SN74AHCT1G126 is a single bus buffer gate/line driver with 3-state output. The output is disabled when the output-enable (OE) input is low. When OE is high, true data is passed from the A input to the Y output. To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. The SN74AHCT1G126 is characterized for operation from 40°C to 85°C.
FUNCTION TABLE INPUTS OE H H L A H L X OUTPUT Y H L Z
logic symbol
OE A 1 2 EN 4 Y
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
OE A 1 2 4
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright © 2000, Texas Instruments Incorporated
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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SN74AHCT1G126 SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT
SCLS380F AUGUST 1997 REVISED JANUARY 2000
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC + 0.5 V Input clamp current, IIK (VI VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Package thermal impedance, JA (see Note 2): DBV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 347°C/W DCK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 389°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions (see Note 3)
MIN VCC VIH VIL VI VO IOH IOL Dt/Dv Supply voltage High-level input voltage Low-level input voltage Input voltage Output voltage High-level output current Low-level output current Input transition rise or fall rate 0 0 4.5 2 0.8 5.5 VCC 8 8 20 MAX 5.5 UNIT V V V V V mA mA ns/V
TA Operating free-air temperature 40 85 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER VOH VOL II IOZ ICC DICC Ci IOH = 50 mA IOH = 8 mA IOL = 50 mA IOL = 8 mA TEST CONDITIONS CONDITIONS VCC 4.5 V 4.5 V 0 V to 5.5 V 5.5 V IO = 0 Other input at VCC or GND 5.5 V 5.5 V 5V 4 TA = 25°C MIN TYP MAX 4.4 3.94 0.1 0.36 ±0.1 ±0.25 1 1.35 10 4.5 MIN 4.4 3.8 0.1 0.44 ±1 ±2.5 10 1.5 10 MAX UNIT V V
VI = VCC or GND VO = VCC or GND VI = VCC or GND, One input at 3.4 V, VI = VCC or GND VO = VCC or GND
mA mA mA
mA pF pF
Co 5V 10 This is the increase in supply current for each input at one of the specified TTL voltage levels rather than 0 V or VCC.
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN74AHCT1G126 SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT
SCLS380F AUGUST 1997 REVISED JANUARY 2000
switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER tPLH tPHL tPZH tPZL tPHZ tPLZ tPLH tPHL tPZH tPZL tPHZ tPLZ FROM (INPUT) A TO (OUTPUT) Y Y Y LOAD CAPACITANCE CL = 15 pF 15 pF CL = 15 pF 15 pF CL = 15 pF 15 pF CL = 50 pF 50 pF CL = 50 pF 50 pF CL = 50 pF 50 pF MIN TA = 25°C TYP MAX 3.8 3.8 3.6 3.6 4.6 4.6 5.3 5.3 5.1 5.1 6.1 6.1 5.5 5.5 5.1 5.1 6.8 6.8 7.5 7.5 7.1 7.1 8.8 8.8 MIN 1 1 1 1 1 1 1 1 1 1 1 1 MAX 6.5 6.5 6 6 8 8 8.5 8.5 8 8 10 10 UNIT ns ns ns
OE OE
A
Y Y Y
ns ns ns
OE OE
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER Cpd Power dissipation capacitance TEST CONDITIONS No load, f = 1 MHz TYP 14 UNIT pF
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