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Details, datasheet, quote on part number:SN74ALS113AD
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Datasheet text preview:
SN54ALS113A, SN74ALS113A DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET
SDAS200 D2661, APRIL 1982 REVISED MAY 1986
· · ·
Fully Buffered to Offer Maximum isolation from External Disturbance Package Options Include Plastic Small Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs Dependable Texas Instruments Quality and Reliability
TYPICAL MAXIMUM CLOCK FREQUENCY 40 MHz (CL=15 pF) TYPICAL POWER DISSIPATION PER FLIP-FLOP 6 mW
SN54ALS113A . . . J PACKAGE SN74ALS113A . . . D OR N PACKAGE (TOP VIEW)
TYPE 'ALS113A
1 CLK 1K 1J 1PRE 1Q 1Q GND
1 2 3 4 5 6 7
14 13 12 11 10 9 8
VC C 2CLK 2K 2J 2PRE 2Q 2Q
SN54ALS113A . . . FK PACKAGE (TOP VIEW)
These devices contain two independent J-K negative-edge-triggered flip-flops. A low level at the Preset input sets the outputs regardless of the levels of the other inputs. When Preset PRE is inactive (high), data at the J and K inputs meeting the setup time requirements are transferred to the outputs on the negative-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the fall time of the clock pulse. Following the hold time interval, data at the J and K inputs may be changed without affecting the levels at the outputs. These versatile flip-flops can perform as toggle flip-flops by tying J and K high. The SN54ALS113A is characterized for operation over the full military temperature range of 55°C to 125°C. The SN74ALS113A is characterized for operation from 0°C to 70°C.
FUNCTION TABLE INPUTS PRE L H H H H H CLK X H J X L H L H X K X L L H H X OUTPUTS Q H Q0 H L Q0 Q L Q0 L H Q0
1J NC 1PRE NC 1Q
4 5 6 7 8
3 2 1 20 19 18 17 16 15 14 9 10 11 12 13
1K 1CLK NC VCC 2CLK 2K NC 2J NC 2PRE
NCNo internal connection
description
logic symbol
4 1PRE 3 1J 1 1CLK 1K 10 2PRE 2J 2CLK 2K 12 8 2Q 11 13 9 2Q 2 1K 1J C1 6 1Q S 5 1Q
TOGGLE This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for D, J, and N packages.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright © 1986, Texas Instruments Incorporated 5BASIC
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
1Q GND NC 2Q 2Q
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SN54ALS113A, SN74ALS113A DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET
SDAS200 D2661, APRIL 1982 REVISED MAY 1986
logic diagram (positive logic)
Q
Q
PRE J
K
CLK
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Operating free-air temperature range: SN54ALS113A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C to 125°C SN74ALS113A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
recommended operating conditions
SN54ALS113A MIN VCC VIH VIL IOH IOL fclock tw Supply voltage High-level input voltage Low-level input voltage High-level output current Low-level output current Clock frequency PRE low Pulse duration CLK high CLK low tsu th TA Setup time before CLK Hold time, data after CLK Operating free-air temperature Data PRE inactive 0 20 20 20 25 20 0 55 125 4.5 2 0.7 0.4 4 25 0 10 16.5 16.5 22 20 0 0 70 ns ns °C ns NOM 5 MAX 5.5 SN74ALS113A MIN 4.5 2 0.8 0.4 8 30 NOM 5 MAX 5.5 UNIT V V V mA mA mHz
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN54ALS113A, SN74ALS113A DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET
SDAS200 D2661, APRIL 1982 REVISED MAY 1986
electrical characteristic over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER VIK VOH VOL II IIH IIL J, K, or CLK PRE J, K, or CLK PRE J, K, or CLK PRE TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V to 5.5 V, VCC = 4.5 V, VCC = 4.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, II = 18 mA IOH = 0.4 mA IOL = 4 mA IOL = 8 mA VI = 7 V VI = 2.7 V VI = 0.4 V MIN SN54ALS113A TYP MAX 1.5 VCC 2 0.25 0.4 0.1 0.2 20 40 0.2 0.4 VCC 2 0.25 0.35 0.4 0.5 0.1 0.2 20 40 0.2 0.4 V mA µA mA MIN SN74ALS113A TYP MAX 1.5 UNIT V V
IO VCC = 5.5 V, VO = 2.25 V 30 112 30 112 mA ICC VCC = 5.5 V, See Note 1 2.5 4.5 2.5 4.5 mA All typical values are at VCC = 5 V, TA = 25°C. The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. NOTE 1: ICC is measured with J, K, CLK, and PRE grounded, then with J, K, CLK, and CLR grounded.
switching characteristics (see Note 2)
VCC = 4.5 V to 5.5 V, CL = 50 pF, PARAMETER FROM (INPUT) TO (OUTPUT) RL = 500 , TA = MIN to MAX SN54ALS113A SN74ALS113A MIN fmax tPLH tPHL tPLH 25 PRE Q or Q Q or Q 3 4 3 5 23 26 22 23 MAX MIN 30 3 4 3 5 14 18 15 19 ns MAX MHz ns UNIT
CLK tPHL NOTE 2: Load circuit and voltage waveforms are shown in Section 1.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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