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Details, datasheet, quote on part number:SN74ALS240ADW
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Datasheet text preview:
SN54ALS240A, SN54AS240A, SN74ALS240A, SN74AS240A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SDAS214E DECEMBER 1982 REVISED AUGUST 2002
D D
3-State Outputs Drive Bus Lines or Buffer Memory Address Registers pnp Inputs Reduce dc Loading
SN54ALS240A, SN54AS240A . . . J OR W PACKAGE SN74ALS240A . . . DB, DW, N, OR NS PACKAGE SN74AS240A . . . DW OR N PACKAGE (TOP VIEW)
description/ordering information
These octal buffers/drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. When these devices are used with the 'ALS241, 'AS241A, 'ALS244, and 'AS244A devices, the circuit designer has a choice of selected combinations of inverting and noninverting outputs, symmetrical active-low output-enable (OE) inputs, and complementary OE and OE inputs. These devices feature high fan-out and improved fan-in. The -1 version of SN74ALS240A is identical to the standard version, except that the recommended maximum IOL for the -1 version is 48 mA. There is no -1 version of the SN54ALS240A.
1OE 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
VCC 2OE 1Y1 2A4 1Y2 2A3 1Y3 2A2 1Y4 2A1
SN54ALS240A, SN54AS240A . . . FK PACKAGE (TOP VIEW)
2Y4 1A1 1OE VCC
1A2 2Y3 1A3 2Y2 1A4
4 5 6 7 8
3 2 1 20 19 18 17 16 15 14 9 10 11 12 13
2OE 1Y1 2A4 1Y2 2A3 1Y3
ORDERING INFORMATION
TA PACKAGE ORDERABLE PART NUMBER SN74ALS240AN PDIP N Tube Tube Tape and reel 0°C to 70°C SOIC DW DW Tube Tape and reel Tube Tape and reel SOP NS NS SSOP DB DB Tape and reel and reel Tape and reel and reel SN74ALS240A-1N SN74AS240AN SN74ALS240ADW SN74ALS240ADWR SN74ALS240A-1DW SN74ALS240A-1DWR SN74AS240ADW SN74AS240ADWR SN74ALS240ANSR SN74ALS240A-1NSR SN74ALS240ADBR TOP-SIDE MARKING SN74ALS240AN SN74ALS240A-1N SN74AS240AN ALS240A ALS240A-1 AS240A ALS240A ALS240A-1 G240A
SN74ALS240A-1DBR G240A-1 Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2002, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
2Y1 GND 2A1 1Y4 2A2
1
SN54ALS240A, SN54AS240A, SN74ALS240A, SN74AS240A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SDAS214E DECEMBER 1982 REVISED AUGUST 2002
description/ordering information (continued)
ORDERING INFORMATION
TA CDIP J 55°C to 125°C to 125°C CFP W LCCC FK FK PACKAGE Tube Tube Tube ORDERABLE PART NUMBER SNJ54ALS240AJ SNJ54AS240AJ SNJ54ALS240AW SNJ54AS240AW SNJ54ALS240AFK SNJ54AS240AFK TOP-SIDE MARKING SNJ54ALS240AJ SNJ54AS240AJ SNJ54ALS240AW SNJ54AS240AW SNJ54ALS240AFK
SNJ54AS240AFK Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each buffer) INPUTS OE L L H A H L X OUTPUT Y L H Z
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN54ALS240A, SN54AS240A, SN74ALS240A, SN74AS240A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SDAS214E DECEMBER 1982 REVISED AUGUST 2002
logic diagram (positive logic)
1OE 1
1A1
2
18
1Y1
1A2
4
16
1Y2
1A3
6
14
1Y3
1A4
8
12
1Y4
2OE
19
2A1
11
9
2Y1
2A2
13
7
2Y2
2A3
15
5
2Y3
2A4
17
3
2Y4
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Package thermal impedance, JA (see Note 1): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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