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Details, datasheet, quote on part number:SN74ALS33ADR
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Datasheet text preview:
SN54ALS33A, SN74ALS33A QUADRUPLE 2-INPUT POSITIVE-NOR BUFFERS WITH OPEN-COLLECTOR OUTPUTS
SDAS034B APRIL 1982 REVISED DECEMBER 1994
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Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs
SN54ALS33A . . . J PACKAGE SN74ALS33A . . . D OR N PACKAGE (TOP VIEW)
description
These devices contain four independent 2-input positive-NOR buffers with open-collector outputs. Open-collector outputs require resistive pullup to perform correctly. They can deliver higher VOH levels and commonly are used in wired-AND applications. These devices perform the Boolean functions Y = A · B or Y = A + B in positive logic. The SN54ALS33A is characterized for operation over the full military temperature range of 55°C to 125°C. The SN74ALS33A is characterized for operation from 0°C to 70°C.
FUNCTION TABLE (each gate) INPUTS A H X L B X H L OUTPUT Y L L H
1Y 1A 1B 2Y 2A 2B GND
1 2 3 4 5 6 7
14 13 12 11 10 9 8
VC C 4Y 4B 4A 3Y 3B 3A
SN54ALS33A . . . FK PACKAGE (TOP VIEW)
1A 1Y NC VCC 4Y 1B NC 2Y NC 2A
4 5 6 7 8 3 2 1 20 19 18 17 16 15 14 9 10 11 12 13
4B NC 4A NC 3Y
NC No internal connection
logic symbol
1A 1B 2A 2B 3A 3B 4A 4B 2 3 5 6 8 9 11 12 13 4Y 10 3Y 1 1
logic diagram (positive logic)
1A 1Y 1B 2A 2Y 2B 3A 3B 4A 4B 1 2 4 5 9 10 12 13 11 8 6 3 1Y
4
2B GND NC 3A 3B
2Y
3Y
4Y
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, J, and N packages.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright © 1994, Texas Instruments Incorporated
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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SN54ALS33A, SN74ALS33A QUADRUPLE 2-INPUT POSITIVE-NOR BUFFERS WITH OPEN-COLLECTOR OUTPUTS
SDAS034B APRIL 1982 REVISED DECEMBER 1994
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Off-state output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Operating free-air temperature range, TA: SN54ALS33A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C to 125°C SN74ALS33A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54ALS33A MIN VCC VIH VIL VOH IOL TA Supply voltage High-level input voltage Low-level input voltage High-level output voltage Low-level output current Operating free-air temperature 55 4.5 2 0.7 5.5 12 125 0 NOM 5 MAX 5.5 SN74ALS33A MIN 4.5 2 0.8 5.5 24 70 NOM 5 MAX 5.5 UNIT V V V V mA °C
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER VIK VOL II IIH IIL IOH ICCH ICCL VCC = 4.5 V, VCC = 4 5 V 4.5 VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 4.5 V, VCC = 5.5 V, VCC = 5.5 V, TEST CONDITIONS CONDITIONS II = 18 mA IOL = 12 mA IOL = 24 mA VI = 7 V VI = 2.7 V VI = 0.4 V VOH = 5.5 V VI = 0 VI = 4.5 V 1.7 5.6 MIN SN54ALS33A TYP MAX 1.5 0.25 0.4 0.1 20 0.1 0.1 2.8 9 1.7 5.6 0.25 0.35 MIN SN74ALS33A TYP MAX 1.5 0.4 0.5 0.1 20 0.1 0.1 2.8 9 UNIT V V mA µA mA mA mA mA
All typical values are at VCC = 5 V, TA = 25°C.
switching characteristics (see Figure 1)
VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 680 , TA = MIN to MAX§ SN54ALS33A MIN tPLH tPHL A or B or Y 10 2 MAX 59 18 SN74ALS33A MIN 10 2 MAX 33 12 ns
PARAMETER
FROM (INPUT)
TO (OUTPUT)
UNIT
§ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN54ALS33A, SN74ALS33A QUADRUPLE 2-INPUT POSITIVE-NOR BUFFERS WITH OPEN-COLLECTOR OUTPUTS
SDAS034B APRIL 1982 REVISED DECEMBER 1994
PARAMETER MEASUREMENT INFORMATION SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
7V VCC S1 RL From Output Under Test CL (see Note A) RL Test Point R1 From Output Under Test CL (see Note A) Test Point From Output Under Test CL (see Note A) R2 Test Point RL = R1 = R2
LOAD CIRCUIT FOR BI-STATE TOTEM-POLE OUTPUTS
LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT FOR 3-STATE OUTPUTS
Timing Input tsu Data Input 1.3 V
3.5 V 1.3 V 0.3 V th 3.5 V 1.3 V 0.3 V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES
High-Level Pulse
3.5 V 1.3 V tw 1.3 V 0.3 V
Low-Level Pulse
3.5 V 1.3 V 1.3 V 0.3 V VOLTAGE WAVEFORMS PULSE DURATIONS
Output Control (low-level enabling) tPZL Waveform 1 S1 Closed (see Note B)
3.5 V 1.3 V 1.3 V 0.3 V tPLZ 1.3 V VOL 0.3 V VOH 1.3 V 0.3 V 3.5 V Input tPLH In-Phase Output 1.3 V 1.3 V 1.3 V 0.3 V tPHL VOH 1.3 V VOL tPLH VOH 1.3 V VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES 1.3 V VOL
[3.5 V
tPHZ tPZH Waveform 2 S1 Open (see Note B)
tPHL Out-of-Phase Output (see Note C)
[0 V
VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. When measuring propagation delay items of 3-state outputs, switch S1 is open. D. All input pulses have the following characteristics: PRR 1 MHz, tr = tf = 2 ns, duty cycle = 50%. E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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