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Details, datasheet, quote on part number:SN74ALVC164245DGG
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Datasheet text preview:
SN74ALVC164245 16-BIT 3.3-V TO 5-V LEVEL SHIFTING TRANSCEIVER WITH 3-STATE OUTPUTS
SCAS416F MARCH 1994 REVISED FEBRUARY 1999
D D D D
Member of the Texas Instruments WidebusTM Family EPIC TM (Enhanced-Performance Implanted CMOS) Submicron Process Latch-Up Performance Exceeds 250 mA Per JESD 17 Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages
DGG OR DL PACKAGE (TOP VIEW)
description
This 16-bit (dual-octal) noninverting bus transceiver contains two separate supply rails; B port has VCCB, which is set at 5 V, and A port has VCCA, which is set to operate at 3.3 V. This allows for translation from a 3.3-V to a 5-V environment and vice versa. The SN74ALVC164245 is designed for asynchronous communication between data buses. To ensure the high-impedance state during power up or power down, the output-enable (OE) input should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN74ALVC164245 is characterized for operation from 40°C to 85°C.
FUNCTION TABLE (each 8-bit section) INPUTS OE L L H DIR L H X OPERATION B data to A bus A data to B bus Isolation
1DIR 1B1 1B2 GND 1B3 1B4 (5 V) VCCB 1B5 1B6 GND 1B7 1B8 2B1 2B2 GND 2B3 2B4 (5 V) VCCB 2B5 2B6 GND 2B7 2B8 2DIR
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
1OE 1A1 1A2 GND 1A3 1A4 VCCA (3.3 V) 1A5 1A6 GND 1A7 1A8 2A1 2A2 GND 2A3 2A4 VCCA (3.3 V) 2A5 2A6 GND 2A7 2A8 2OE
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC and Widebus are trademarks of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright © 1999, Texas Instruments Incorporated
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
1
SN74ALVC164245 16-BIT 3.3-V TO 5-V LEVEL SHIFTING TRANSCEIVER WITH 3-STATE OUTPUTS
SCAS416F MARCH 1994 REVISED FEBRUARY 1999
logic symbol
48 1OE 1DIR 1 25 2OE 2DIR 24 G3 3 EN1 [BA] 3 EN2 [AB] G6 6 EN4 [BA] 6 EN5 [AB] 1A1 47 1 2 2 1B1
1A2 1A3 1A4 1A5 1A6 1A7 1A8 2A1
46 44 43 41 40 38 37 36 4
3 5 6 8 9 11 12 13
1B2 1B3 1B4 1B5 1B6 1B7 1B8 2B1
2A2 2A3 2A4 2A5 2A6 2A7 2A8
35 33 32 30 29 27 26
5
14 16 17 19 20 22 23
2B2 2B3 2B4 2B5 2B6 2B7 2B8
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
1DIR 1 2DIR 48 24
1OE
25
2OE
1A1
47
2A1
36
2
1B1
13
2B1
To Seven Other Channels
To Seven Other Channels
2
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN74ALVC164245 16-BIT 3.3-V TO 5-V LEVEL SHIFTING TRANSCEIVER WITH 3-STATE OUTPUTS
SCAS416F MARCH 1994 REVISED FEBRUARY 1999
absolute maximum ratings over operating free-air temperature range for VCCB at 5 V and VCCA at 3.3 V (unless otherwise noted)
Supply voltage range: VCCA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 4.6 V VCCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 6 V Input voltage range, VI: Except I/O ports (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 6 V I/O port A (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCCA + 0.5 V I/O port B (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCCB + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous current through each VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA Package thermal impedance, JA (see Note 3): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89°C/W DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. This value is limited to 6 V maximum. 2. This value is limited to 4.6 V maximum. 3. The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions for VCCB at 5 V (see Note 4)
MIN VCCB VIH VIL VIA VOB IOH IOL t/v Supply voltage High-level input voltage Low-level input voltage Input voltage Output voltage High-level output current Low-level output current Input transition rise or fall rate 0 0 4.5 2 0.8 VCCB VCCB 24 24 10 MAX 5.5 UNIT V V V V V mA mA ns/V
TA Operating free-air temperature 40 85 °C NOTE 4: All unused inputs of the device must be held at the associated VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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