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Details, datasheet, quote on part number:SN74ALVCH16244DLR
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Datasheet text preview:
SCES014I - JULY 1995 - REVISED AUGUST 2003
SN74ALVCH16244 16 BIT BUFFER/DRIVER WITH 3 STATE OUTPUTS
D Member of the Texas Instruments D D D D D D
Widebus Family Operates From 1.65 V to 3.6 V Max tpd of 3 ns at 3.3 V ±24-mA Output Drive at 3.3 V Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A)
DGG, DGV, OR DL PACKAGE (TOP VIEW)
description/ordering information
This 16-bit buffer/driver is designed for 1.65-V to 3.6-V VCC operation. The SN74ALVCH16244 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and symmetrical active-low output-enable (OE) inputs.
1OE 1Y1 1Y2 GND 1Y3 1Y4 VCC 2Y1 2Y2 GND 2Y3 2Y4 3Y1 3Y2 GND 3Y3 3Y4 VCC 4Y1 4Y2 GND 4Y3 4Y4 4OE
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
2OE 1A1 1A2 GND 1A3 1A4 VCC 2A1 2A2 GND 2A3 2A4 3A1 3A2 GND 3A3 3A4 VCC 4A1 4A2 GND 4A3 4A4 3OE
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. ORDERING INFORMATION
TA SSOP - DL -40°C to 85°C TSSOP - DGG TVSOP - DGV VFBGA - GQL VFBGA - ZQL (Pb-free) PACKAGE Tube Tape and reel Tape and reel Tape and reel Tape and reel ORDERABLE PART NUMBER SN74ALVCH16244DL SN74ALVCH16244DLR SN74ALVCH16244DGGR SN74ALVCH16244DGVR SN74ALVCH16244KR 74ALVCH16244ZQLR ALVCH16244 ALVCH16244 VH244 VH244 TOP-SIDE MARKING
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 2003, Texas Instruments Incorporated
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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SCES014I - JULY 1995 - REVISED AUGUST 2003
SN74ALVCH16244 16 BIT BUFFER/DRIVER WITH 3 STATE OUTPUTS
GQL OR ZQL PACKAGE (TOP VIEW) 1 A B C D E F G H J K 2 3 4 5 6
terminal assignments
1 A B C D E F G H J K 1OE 1Y2 1Y4 2Y2 2Y4 3Y1 3Y3 4Y1 4Y3 4OE 2 NC 1Y1 1Y3 2Y1 2Y3 3Y2 3Y4 4Y2 4Y4 NC GND VCC GND NC GND VCC GND NC 3 NC GND VCC GND 4 NC GND VCC GND 5 NC 1A1 1A3 2A1 2A3 3A2 3A4 4A2 4A4 NC 6 2OE 1A2 1A4 2A2 2A4 3A1 3A3 4A1 4A3 3OE
NC - No internal connection
FUNCTION TABLE (each 4-bit buffer) INPUTS OE L L H A H L X OUTPUT Y H L Z
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SCES014I - JULY 1995 - REVISED AUGUST 2003
SN74ALVCH16244 16 BIT BUFFER/DRIVER WITH 3 STATE OUTPUTS
logic diagram (positive logic)
1OE 1 3OE 2 25
1A1
47
1Y1
3A1
36
13
3Y1
1A2
46
3
1Y2
3A2
35
14
3Y2
1A3
44
5
1Y3
3A3
33
16
3Y3
1A4
43
6
1Y4
3A4
32
17
3Y4
2OE
48
4OE 8
24
2A1
41
2Y1
4A1
30
19
4Y1
2A2
40
9
2Y2
4A2
29
20
4Y2
2A3
38
11
2Y3
4A3
27
22
4Y3
2A4
37
12
2Y4
4A4
26
23
4Y4
Pin numbers shown are for the DGG, DGV, and DL packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 4.6 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 4.6 V Output voltage range, VO (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous current through each VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA Package thermal impedance, JA (see Note 3): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63°C/W GQL/ZQL package . . . . . . . . . . . . . . . . . . . . . . . . . . . 42°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. This value is limited to 4.6 V maximum. 3. The package thermal impedance is calculated in accordance with JESD 51-7.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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SCES014I - JULY 1995 - REVISED AUGUST 2003
SN74ALVCH16244 16 BIT BUFFER/DRIVER WITH 3 STATE OUTPUTS
recommended operating conditions (see Note 4)
MIN VCC VIH Supply voltage VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V VCC = 1.65 V to 1.95 V VIL VI VO Low-level input voltage Input voltage Output voltage VCC = 1.65 V VCC = 2.3 V VCC = 2.7 V VCC = 3 V VCC = 1.65 V VCC = 2.3 V VCC = 2.7 V VCC = 3 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V 0 0 1.65 0.65 × VCC 1.7 2 0.35 × VCC 0.7 0.8 VCC VCC -4 -12 -12 -24 4 12 12 24 10 ns/V mA mA V V V V MAX 3.6 UNIT V
High-level input voltage
IOH
High-level output current
IOL
Low-level output current
t/v
Input transition rise or fall rate
TA Operating free-air temperature -40 85 °C NOTE 4: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SCES014I - JULY 1995 - REVISED AUGUST 2003
SN74ALVCH16244 16 BIT BUFFER/DRIVER WITH 3 STATE OUTPUTS
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER IOH = -100 µA IOH = -4 mA IOH = -6 mA VOH IOH = -12 mA IOH = -24 mA IOL = 100 µA IOL = 4 mA IOL = 6 mA IOL = 12 mA IOL = 24 mA VI = VCC or GND VI = 0.58 V VI = 1.07 V II(hold) VI = 0.7 V VI = 1.7 V VI = 0.8 V VI = 2 V IOZ ICC ICC Control inputs Ci Co Data inputs VI = VCC or GND 3.3 V VI = 0 to 3.6 V VO = VCC or GND VI = VCC or GND, One input at VCC - 0.6 V, IO = 0 Other inputs at VCC or GND TEST CONDITIONS VCC 1.65 V to 3.6 V 1.65 V 2.3 V 2.3 V 2.7 V 3V 3V 1.65 V to 3.6 V 1.65 V 2.3 V 2.3 V 2.7 V 3V 3.6 V 1.65 V 1.65 V 2.3 V 2.3 V 3V 3V 3.6 V 3.6 V 3.6 V 3 V to 3.6 V 3 6 pF 25 -25 45 -45 75 -75 ±500 ±10 40 750 µA µA µA µA MIN TYP MAX UNIT VCC-0.2 1.2 2 1.7 2.2 2.4 2 0.2 0.45 0.4 0.7 0.4 0.55 ±5 µA V V
VOL
II
Outputs VO = VCC or GND 3.3 V 7 pF All typical values are at VCC = 3.3 V, TA = 25°C. This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to another.
switching characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)
PARAMETER tpd ten tdis FROM (INPUT) A OE OE TO (OUTPUT) Y Y Y VCC = 1.8 V TYP § § § VCC = 2.5 V ± 0.2 V MIN 1 1 1 MAX 3.7 5.7 5.2 VCC = 2.7 V MIN MAX 3.6 5.4 4.6 VCC = 3.3 V ± 0.3 V MIN 1 1 1 MAX 3 4.4 4.1 ns ns ns UNIT
§ This information was not available at the time of publication.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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