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Details, datasheet, quote on part number:SN74AS162N
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Datasheet text preview:
SN54ALS160B THRU SN54ALS163B, SN54AS160 THRU SN54AS163 SN74ALS160B THRU SN74ALS163B, SN74AS160 THRU SN74AS163 SYNCHRONOUS 4-BIT DECADE AND BINARY COUNTERS
SDAS024A D2661, APRIL 1982 REVISED MAY 1986
· · · · · ·
Internal Look-Ahead for Fast Counting Carry Output for n-Bit Cascading Synchronous Counting Synchronously Programmable Package Options include Plastic Small Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs Dependable Texas Instruments Quality and Reliability
SN54ALS', SN54AS' . . . J PACKAGE SN74ALS', SN74AS' . . . D OR N PACKAGE (TOP VIEW)
CLR CLK A B C D ENP GND
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
VC C RCO QA QB QC QD ENT LOAD
description
These synchronous, presettable counters feature an internal carry look-ahead for application in high-speed counting designs. The 'ALS160B, 'ALS162B, 'AS160, and 'AS162 are decade counters, and the 'ALS161B, 'ALS163B, 'AS161, and 'AS163 are 4-bit binary counters. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when so instructed by the count-enable inputs and internal gating. This mode of operation eliminates the output counting spikes that are normally associated with asynchronous (ripple clock) counters. A buffered clock input triggers the four flip-flops on the rising (positive-going) edge of the clock input waveform.
SN54ALS', SN54AS' . . . FK PACKAGE (TOP VIEW)
A B NC C D
4 5 6 7 8
3 2 1 20 19 18 17 16 15 14 9 10 11 12 13
CLK CLR NC VCC RCO QA QB NC QC QD
NCNo internal connection
Copyright © 1986, Texas Instruments Incorporated 5BASIC
These counters are fully programmable; that is, they may be preset to any number between 0 and 9, or 15. As presetting is synchronous, setting up a low level at the load input disables the counter and causes the outputs to agree with the setup data after the next clock pulse regardless of the levels of the enable inputs. The clear function for the 'ALS160B, 'ALS161B, 'AS160, and 'AS161 is asynchronous and a low level at the clear input sets all four of the flip-flop outputs low regardless of the levels of the clock, load, or enable inputs. This synchronous clear allows the count length to be modified easily by decoding the Q outputs for the maximum count desired. The active-low output of the gate used for decoding is connected to the clear input to synchronously clear the counter to 0000 (LLLL). The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without additional gating. Instrumental in accomplishing this function are two count-enable inputs and a ripple carry output. Both count-enable inputs (ENP and ENT) must be high to count, and ENT is fed forward to enable the ripple carry output. The ripple carry output (RCO) thus enabled will produce a high-level pulse while the count is maximum (9 or 15 with QA high). This high-level overflow ripple carry pulse can be used to enable successive cascaded stages. Transitions at the ENP or ENT are allowed regardless of the level of the clock input. These counters feature a fully independent clock circuit. Changes at control inputs (ENP, ENT, or LOAD) that will modify the operating mode have no effect on the contents of the counter until clocking occurs. The function of the counter (whether enabled, disabled, loading, or counting) will be dictated solely by the conditions meeting the stable setup and hold times. The SN54ALS160B through SN54ALS163B and SN54AS160 through SN54AS163 are characterized for operation over the full military temperature range of 55°C to 125°C. The SN74ALS160B through SN74ALS163B and SN74AS160 through SN74AS163 are characterized for operation from 0°C to 70°C.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
ENP GND NC LOAD ENT
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SN54ALS160B, SN54ALS162B, SN54AS160, SN54AS162 SN74ALS160B, SN74ALS162B, SN74AS160, SN74AS162 SYNCHRONOUS 4-BIT BINARY COUNTERS
SDAS024A D2661, APRIL 1982 REVISED MAY 1986
logic symbols
'ALS160B AND 'AS160 BINARY COUNTERS WITH DIRECT CLEAR CTRDIV10 CLR LOAD 1 9 CT=0 M1 M2 ENT ENP CLK A B C D 10 7 2 3 4 5 6 G3 G4 C5/2,3,4+ 1,5D [1] [2] [4] [8] 14 13 12 11 QA QB QC QD 3CT = 9 15 RCO ENT ENP CLK A B C D CLR LOAD 1 9 M1 M2 10 7 2 3 4 5 6 G3 G4 C5/2,3,4+ 1,5D [1] [2] [4] [8] 14 13 12 11 QA QB QC QD 3CT = 9 15 RCO 'ALS162B AND 'AS162 BINARY COUNTERS WITH SYNCHRONOUS CLEAR CTRDIV10 5CT=0
'ALS160B and 'AS160 logic diagram (positive logic)
1 CLR 9 LOAD 10 ENT 7 ENP 2 C1 1D R A 3 14 QA 15
RCO
CLK
C1 1D R B 4
13
QB
C
5
C1 1D R
12
QC
C1 1D R D 6
11
QD
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for D, J, and N packages. 'ALS162B and 'AS162 decade counters are similar; however the clear is synchronous as shown for the 'ALS163B and 'AS163 binary counters.
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN54ALS161B, SN54ALS163B, SN54AS161, SN54AS163 SN74ALS161B, SN74ALS163B, SN74AS161, SN74AS163 SYNCHRONOUS 4-BIT BINARY COUNTERS
SDAS024A D2661, APRIL 1982 REVISED MAY 1986
logic symbols
'ALS161B AND 'AS161 BINARY COUNTERS WITH DIRECT CLEAR CTRDIV16 CLR LOAD 1 9 CT=0 M1 M2 ENT ENP CLK A B C D 10 7 2 3 4 5 6 G3 G4 C5/2,3,4+ 1,5D [1] [2] [4] [8] 14 13 12 11 QA QB QC QD 3CT = 15 15 RCO ENT ENP CLK A B C D CLR LOAD 1 9 M1 M2 10 7 2 3 4 5 6 G3 G4 C5/2,3,4+ 1,5D [1] [2] [4] [8] 14 13 12 11 QA QB QC QD 3CT = 15 15 RCO 'ALS163B AND 'AS163 BINARY COUNTERS WITH SYNCHRONOUS CLEAR CTRDIV16 5CT=0
'ALS163B and 'AS163 logic diagram (positive logic)
CLR LOAD ENT ENP 1 9 10 7
15
RCO
CLK
2 C1 1D 3
14
QA
A
C1 1D B 4
13
QB
C1 1D C 5
12
QC
C1 1D D 6
11
QD
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for D, J, and N packages. 'ALS161B and 'AS161 synchronous binary counters are similar; however the clear is asynchronous as shown for the 'ALS160B and 'AS160 decade counters.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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