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Details, datasheet, quote on part number:SN74AS533ADWR
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Datasheet text preview:
SN74ALS533A, SN74AS533A OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SDAS270 DECEMBER 1994
· · · · · ·
Eight Latches in a Single Package 3-State Bus-Driving Inverting Outputs Full Parallel Access for Loading Buffered Control Inputs pnp Inputs Reduce dc Loading on Data Lines Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (N) 300-mil DIPs
DW OR N PACKAGE (TOP VIEW)
description
These 8-bit D-type transparent latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
OE 1Q 1D 2D 2Q 3Q 3D 4D 4Q GND
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
VCC 8Q 8D 7D 7Q 6Q 6D 5D 5Q LE
While latch-enable (LE) input is high, the Q outputs follow the complements of the data (D) inputs. When LE is taken low, the Q outputs are latched at the inverses of the levels set up at the D inputs. The SN74ALS533A and SN74AS533A are functionally equivalent to the SN74ALS373A and SN74AS373, except for having inverted outputs. A buffered output-enable (OE) input places the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are off. The SN74ALS533A and SN74AS533A are characterized for operation from 0°C to 70°C.
FUNCTION TABLE (each latch) INPUTS OE L L L H LE H H L X D H L X X OUTPUT Q L H Q0 Z
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright © 1994, Texas Instruments Incorporated
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
1
SN74ALS533A, SN74AS533A OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SDAS270 DECEMBER 1994
logic symbol
1 OE LE 11
logic diagram (positive logic)
OE EN C1 2 5 6 9 12 15 16 19 7Q 8Q 3D 7 1D 9 3Q 4Q 5Q 6Q C1 2D 4 C1 1D 6 5 2Q LE 11 C1 1Q 2Q 1D 3 1D 2 1
1D 2D 3D 4D 5D 6D 7D 8D
3 4 7 8 13 14 17 18
1Q
1D
1
3Q
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 4D
C1 8 1D
4Q
C1 5D 13 1D C1 6D 14 1D
12
5Q
15
6Q
C1 7D 17 1D
16
7Q
C1 8D 18 1D
19
8Q
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Operating free-air temperature range, TA: SN74ALS533A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN74ALS533A, SN74AS533A OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SDAS270 DECEMBER 1994
recommended operating conditions
SN74ALS533A MIN VCC VIH VIL IOH IOL tw tsu th TA Supply voltage High-level input voltage Low-level input voltage High-level output current Low-level output current Pulse duration, LE high Setup time, data before LE Hold time, data after LE Operating free-air temperature 15 15 7 0 70 4.5 2 0.8 2.6 24 NOM 5 MAX 5.5 UNIT V V V mA mA ns ns ns °C
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER VIK VOH VOL IOZH IOZL II IIH IIL IO ICC TEST CONDITIONS CONDITIONS VCC = 4.5 V, VCC = 4.5 V to 5.5 V, VCC = 4.5 V, VCC = 4 5 V 4.5 VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V II = 18 mA IOH = 0.4 mA IOH = 2.6 mA IOL = 12 mA IOL = 24 mA VO = 2.7 V VO = 0.4 V VI = 7 V VI = 2.7 V VI = 0.4 V VO = 2.25 V Outputs high Outputs low Outputs disabled 30 10 17 18.5 MIN SN74ALS533A TYP MAX 1.5 VCC 2 2.4 3.2 0.25 0.35 0.4 0.5 20 20 0.1 20 0.1 112 17 26 28 mA UNIT V V V µA µA mA µA mA mA
All typical values are at VCC = 5 V, TA = 25°C. The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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