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Details, datasheet, quote on part number:SN74AUCH240
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Datasheet text preview:
SN74AUCH240 OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
SCES431A MARCH 2003 REVISED MARCH 2003
D D D D D D D D D
Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation Ioff Supports Partial-Power-Down Mode Operation Sub 1-V Operable Max tpd of 1.7 ns at 1.8 V Low Power Consumption, 20-µA Max ICC ±8-mA Output Drive at 1.8 V Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)
RGY PACKAGE (TOP VIEW)
1OE
1
20 19 2OE 18 1Y1 17 2A4 16 1Y2 15 2A3 14 1Y3 13 2A2 12 1Y4
1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1
2 3 4 5 6 7 8 9 10 11
description/ordering information
This octal buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation. The SN74AUCH240 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. This device is organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. ORDERING INFORMATION
TA PACKAGE ORDERABLE PART NUMBER TOP-SIDE MARKING
40°C to 85°C QFN RGY Tape and reel SN74AUCH240RGYR MT240 Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
GND
2A1
VCC
1
SN74AUCH240 OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
SCES431A MARCH 2003 REVISED MARCH 2003
FUNCTION TABLE (each 4-bit buffer/driver) INPUTS OE L L H A H L X OUTPUT Y L H Z
logic diagram (positive logic)
1OE 1 2OE 19
1A1
2
18
1Y1
2A1
11
9
2Y1
1A2
4
16
1Y2
2A2
13
7
2Y2
1A3
6
14
1Y3
2A3
15
5
2Y3
1A4
8
12
1Y4
2A4
17
3
2Y4
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 3.6 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 3.6 V Voltage range applied to any output in the high-impedance or power-off state, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 3.6 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA Package thermal impedance, JA (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-5.
2
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN74AUCH240 OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
SCES431A MARCH 2003 REVISED MARCH 2003
recommended operating conditions (see Note 3)
MIN VCC VIH Supply voltage High-level input voltage VCC = 0.8 V VCC = 1.1 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 0.8 V VCC = 1.1 V to 1.95 V VCC = 2.3 V to 2.7 V VI VO Input voltage Output voltage voltage Active state 3-state VCC = 0.8 V VCC = 1.1 V IOH High-level output current VCC = 1.4 V VCC = 1.65 V VCC = 2.3 V VCC = 0.8 V IOL Low-level output current VCC = 1.1 V VCC = 1.4 V VCC = 1.65 V VCC = 2.3 V t/v Input transition rise or fall rate 0 0 0 0.8 VCC 0.65 × VCC 1.7 0 0.35 × VCC 0.7 3.6 VCC 3.6 0.7 3 5 8 9 0.7 3 5 8 9 20 ns/V mA mA V V V MAX 2.7 UNIT V V
VIL
Low-level input voltage
TA Operating free-air temperature 40 85 °C NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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