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Details, datasheet, quote on part number:SN74AVCA164245KR
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Datasheet text preview:
SN74AVCA164245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES395 JULY 2002
D D D D D D
Member of the Texas Instruments Widebus Family DOC Circuitry Dynamically Changes Output Impedance, Resulting in Noise Reduction Without Speed Degradation Dynamic Drive Capability Is Equivalent to Standard Outputs With IOH and IOL of ±24 mA at 2.5-V VCC Control Inputs VIH/VIL Levels are Referenced to VCCA Voltage If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State Overvoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data Communications
D D D D
Ioff Supports Partial-Power-Down Mode Operation Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.4-V to 3.6-V Power-Supply Range Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)
description/ordering information
This 16-bit (dual-octal) noninverting bus transceiver uses two separate configurable power-supply rails. The A-port is designed to track VCCA. VCCA accepts any supply voltage from 1.4 V to 3.6 V. The B-port is designed to track VCCB. VCCB accepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes. The SN74AVCA164245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are effectively isolated. The SN74AVCA164245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCA. To ensure the high-impedance state during power up or power down, OE should be tied to VCCA through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. If either VCC input is at GND, then both ports are in the high-impedance state. ORDERING INFORMATION
TA PACKAGE TSSOP DGG 40°C to 85°C TVSOP DGV VFBGA GQL Tape and reel Tape and reel Tape and reel ORDERABLE PART NUMBER SN74AVCA164245GR SN74AVCA164245VR SN74AVCA164245KR TOP-SIDE MARKING AVCA164245 WA4245
WA4245 Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. DOC and Widebus are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 2002, Texas Instruments Incorporated
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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SN74AVCA164245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES395 JULY 2002
terminal assignments
DGG OR DGV PACKAGE (TOP VIEW)
1DIR 1B1 1B2 GND 1B3 1B4 VCCB 1B5 1B6 GND 1B7 1B8 2B1 2B2 GND 2B3 2B4 VCCB 2B5 2B6 GND 2B7 2B8 2DIR
GQL PACKAGE (TOP VIEW) 1 A B C D E F G H J K 2 3 4 5 6 1 A B C D E F G H J K 1DIR 1B2 1B4 1B6 1B8 2B1 2B3 2B5 2B7 2DIR
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
1OE 1A1 1A2 GND 1A3 1A4 VCCA 1A5 1A6 GND 1A7 1A8 2A1 2A2 GND 2A3 2A4 VCCA 2A5 2A6 GND 2A7 2A8 2OE
terminal assignments
2 NC 1B1 1B3 1B5 1B7 2B2 2B4 2B6 2B8 NC GND VCCB GND NC GND VCCA GND NC 3 NC GND VCCB GND 4 NC GND VCCA GND 5 NC 1A1 1A3 1A5 1A7 2A2 2A4 2A6 2A8 NC 6 1OE 1A2 1A4 1A6 1A8 2A1 2A3 2A5 2A7 2OE
NC No internal connection
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN74AVCA164245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES395 JULY 2002
FUNCTION TABLE (each 8-bit section) INPUTS OE L L H DIR L H X OPERATION B data to A bus A data to B bus Isolation
logic diagram (positive logic)
1DIR 1 2DIR 48 24
1OE
25
2OE
1A1
47
2A1
36
2
1B1
13
2B1
To Seven Other Channels Pin numbers shown are for the DGG and DGV packages.
To Seven Other Channels
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
3
SN74AVCA164245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES395 JULY 2002
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCCA and VCCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 4.6 V Input voltage range, VI (see Note 1): I/O ports (A port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 4.6 V I/O ports (B port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 4.6 V Control inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 4.6 V Voltage range applied to any output in the high-impedance or power-off state, VO (see Note 1): (A port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 4.6 V (B port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 4.6 V Voltage range applied to any output in the high or low state, VO (see Notes 1 and 2): (A port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCCA + 0.5 V (B port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCCB + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous current through VCCA, VCCB, or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA Package thermal impedance, JA (see Note 3): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W GQL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. 2. The output positive-voltage rating may be exceeded up to 4.6 V maximum if the output current rating is observed. 3. The package thermal impedance is calculated in accordance with JESD 51-7.
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN74AVCA164245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES395 JULY 2002
recommended operating conditions (see Notes 4 through 6)
VCCI VCCA VCCB VIH Supply voltage Supply voltage 1.4 V to 1.95 V High-level i input t voltage Data inputs 1.95 V to 2.7 V 2.7 V to 3.6 V 1.4 V to 1.95 V VIL Low-level input i t voltage Data inputs 1.95 V to 2.7 V 2.7 V to 3.6 V 1.4 V to 1.95 V VIH High-level i input t voltage Control i inputs t (Referenced to VCCA) to 1.95 V to 2.7 V 2.7 V to 3.6 V 1.4 V to 1.95 V VIL VO Low-level input i t voltage Output voltage 1.4 V to 1.6 V IOH High-level output current output current 1.65 V to 1.95 V 2.3 V to 2.7 V 3 V to 3.6 V 1.4 V to 1.6 V IOL Low-level output current output current 1.65 V to 1.95 V 2.3 V to 2.7 V 3 V to 3.6 V t/v Input transition rise or fall rate Control i t inputs (Referenced to VCCA) to 1.95 V to 2.7 V 2.7 V to 3.6 V VCCO MIN 1.4 1.4 VCCI × 0.65 1.7 2 0 0 0 VCCA × 0.65 1.7 2 0 0 0 0 MAX 3.6 3.6 VCCI VCCI VCCI VCCI × 0.35 0.7 0.8 VCCA VCCA VCCA VCCA × 0.35 0.7 0.8 VCCO 2 4 8 12 2 4 8 12 5 ns/V mA V V V V UNIT V V V
mA
TA Operating free-air temperature 40 85 °C NOTES: 4. VCCI is the VCC associated with the data input port. 5. VCCO is the VCC associated with the output port. 6. All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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· DALLAS, TEXAS 75265
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