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Details, datasheet, quote on part number:SN74BCT956DW
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Datasheet text preview:
SN74BCT956 OCTAL BUS TRANSCEIVER AND LATCH WITH 3-STATE OUTPUTS
SCBS088A NOVEMBER 1991 REVISED NOVEMBER 1993
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State-of-the-Art BiCMOS Design Significantly Reduces ICCZ ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch Version of the BCT646 Independent Latches and Enables for A and B Buses Multiplexed Real-Time and Stored Data Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic 300-mil DIPs (NT)
DW OR NT PACKAGE (TOP VIEW)
LEAB SAB DIR A1 A2 A3 A4 A5 A6 A7 A8 GND
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
VCC LEBA SBA OE B1 B2 B3 B4 B5 B6 B7 B8
description
The SN74BCT956 consists of bus transceiver circuits, D-type latches, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal latches. Data on the A or B bus is stored in the latches when the appropriate latch-enable (LEAB or LEBA) input is low. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the SN74BCT956. Output-enable (OE) and direction-control (DIR) inputs are provided to control the transceiver functions. In the transceiver mode (OE low), data present at the high-impedance port may be stored in either latch or in both. The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. When the appropriate latch-enable input is high, the latch is transparent, and real-time data is output regardless of the level at the select control. The direction control (DIR) determines which bus receives data when OE is low. In the isolation mode (OE high), A data may be stored in one register and/or B data may be stored in the other register. When an output function is disabled, the input function is still enabled and may be used to store and transmit data. Only one of the two buses, A or B, may be driven at a time. The SN74BCT956 is characterized for operation from 0°C to 70°C.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright © 1993, Texas Instruments Incorporated
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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SN74BCT956 OCTAL BUS TRANSCEIVER AND LATCH WITH 3-STATE OUTPUTS
SCBS088A NOVEMBER 1991 REVISED NOVEMBER 1993
BUS B
21 OE L L
3 DIR L L
1 LEAB X X
23 LEBA X H
2 SAB X X
22 SBA L (Thru) H (Latch)
21 OE L L
3 DIR H H
1 LEAB X H
23 LEBA X X
2 SAB L H
BUS B 22 SBA X (Thru) X (Latch) REAL-TIME TRANSFER BUS A TO BUS B 1 LEAB X L 23 LEBA L X 2 SAB X H BUS B 22 SBA H X TRANSFER STORED DATA TO A OR B
BUS A
REAL-TIME TRANSFER BUS B TO BUS A
BUS B
BUS A
21 OE X X H
3 DIR X X X
1 LEAB L X L
23 LEBA X L L
2 SAB X X X
22 SBA X X X
21 OE L L
STORAGE FROM A, B, OR A AND B
Figure 1. Bus-Management Functions
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
BUS A 3 DIR L H
BUS A
SN74BCT956 OCTAL BUS TRANSCEIVER AND LATCH WITH 3-STATE OUTPUTS
SCBS088A NOVEMBER 1991 REVISED NOVEMBER 1993
FUNCTION TABLE INPUTS OE X X L L L L L L L L H DIR X X H H H H L L L L X LEAB L X X H L L X X X X L LEBA X L X X X X X H L L L SAB X X L H L H X X X X X SBA X X X X X X L H L H X Input Unspecified Input Input Input Input Output Output Output Output Input DATA I/O A1 THRU A8 B1 THRU B8 Unspecified Input Output Output Output Output Input Input Input Input Input OPERATION OR FUNCTION OR FUNCTION Store A, B unspecified Store B, A unspecified A transparent, real-time A data to B bus (thru) A transparent, real-time A data to B bus (latch) A data latched, real-time A data to B bus (thru) A data latched, latched A data to B bus (latch) B transparent, real-time B data to A bus (thru) B transparent, real-time B data to A bus (latch) B data latched, real-time B data to A bus (thru) B data latched, latched B data to A bus (latch) Isolation, A and B data latched
H X H H X X Input Input Isolation, no storage The data output functions may be enabled or disabled by various signals at the OE and DIR inputs. Data input functions are always enabled; i.e., data at the bus pins is latched whenever the appropriate latch-enable input is low.
logic symbol
OE DIR LEBA SBA LEAB SAB 21 3 23 22 1 2 G3 3 EN1 [BA] 3 EN2 [AB] C4 G5 C6 G7 1 1 6D 1 A2 A3 A4 A5 A6 A7 A8 5 6 7 8 9 10 11 7 7 19 18 17 16 15 14 13 B2 B3 B4 B5 B6 B7 B8 5 51 1 2 4D 20 B1
A1
4
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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