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Details, datasheet, quote on part number:SN74CBT16211A
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Datasheet text preview:
SN74CBT16211A 24-BIT FET BUS SWITCH
SCDS028L JULY 1995 REVISED SEPTEMBER 2001
D D D
Member of the Texas Instruments Widebus Family 5- Switch Connection Between Two Ports TTL-Compatible Input Levels
DGG, DGV, OR DL PACKAGE (TOP VIEW)
description
The SN74CBT16211A provides 24 bits of high-speed TTL-compatible bus switching. The low on-state resistance of the switch allows connections to be made with minimal propagation delay. The device operates as a dual 12-bit bus switch or single 24-bit bus switch. When 1OE is low, 1A is connected to 1B. When 2OE is low, 2A is connected to 2B.
NC 1A1 1A2 1A3 1A4 1A5 1A6 GND 1A7 1A8 1A9 1A10 1A11 1A12 2A1 2A2 VCC 2A3 GND 2A4 2A5 2A6 2A7 2A8 2A9 2A10 2A11 2A12
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
1OE 2OE 1B1 1B2 1B3 1B4 1B5 GND 1B6 1B7 1B8 1B9 1B10 1B11 1B12 2B1 2B2 2B3 GND 2B4 2B5 2B6 2B7 2B8 2B9 2B10 2B11 2B12
NC No internal connection
ORDERING INFORMATION
TA PACKAGE SSOP DL DL 40°C to 85°C TSSOP DGG TVSOP DGV VFBGA GQL Tube Tape and reel Tape and reel Tape and reel Tape and reel ORDERABLE PART NUMBER SN74CBT16211ADL SN74CBT16211ADLR SN74CBT16211ADGGR SN74CBT16211ADGVR SN74CBT16211AGQLR TOP-SIDE MARKING CBT16211A CBT16211A CY211A CY211A
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 2001, Texas Instruments Incorporated
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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SN74CBT16211A 24-BIT FET BUS SWITCH
SCDS028L JULY 1995 REVISED SEPTEMBER 2001
GQL PACKAGE (TOP VIEW) 1 A B C D E F G H J K 2 3 4 5 6
terminal assignments
1 A B C D E F G H J K 1A2 1A5 1A7 1A10 1A12 2A1 VCC 2A4 2A7 2A10 2 1A1 1A4 GND 1A8 1A11 2A2 GND 2A5 2A8 2A11 2A3 2A6 2A9 2A12 2B3 2B6 2B9 2B12 3 NC 1A3 1A6 1A9 4 1OE 1B2 1B5 1B8 5 2OE 1B3 GND 1B7 1B10 2B1 GND 2B5 2B8 2B11 6 1B1 1B4 1B6 1B9 1B11 1B12 2B2 2B4 2B7 2B10
NC No internal connection
FUNCTION TABLE (each 12-bit bus switch) INPUTS 1OE L L H H 2OE L H L H INPUTS/OUTPUTS 1A, 1B 1A = 1B 1A = 1B Z Z 2A, 2B 2A = 2B Z 2A = 2B Z
logic diagram (positive logic)
1A1 2 54 1B1
1A12
14
42
1B12
1OE
56
2A1
15
41
2B1
2A12
28
29
2B12
2OE
55
Pin numbers shown are for the DGG, DGV, and DL packages.
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN74CBT16211A 24-BIT FET BUS SWITCH
SCDS028L JULY 1995 REVISED SEPTEMBER 2001
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Package thermal impedance, JA (see Note 2): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48°C/W DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56°C/W GQL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
MIN VCC VIH VIL TA Supply voltage High-level control input voltage Low-level control input voltage Operating free-air temperature 40 4 2 0.8 85 MAX 5.5 UNIT V V V °C
NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER VIK II ICC ICC§ Ci Cio(off) VCC = 4.5 V, VCC = 0 V, VCC = 5.5 V, VCC = 5.5 V, Control inputs Control inputs VCC = 5.5 V, VI = 3 V or 0 VO = 3 V or 0, VCC = 4 V, TYP at VCC = 4 V TEST CONDITIONS II = 18 mA VI = 5.5 V VI = 5.5 V or GND IO = 0, One input at 3.4 V, OE = VCC VI = 2.4 V, VI = 0 II = 15 mA II = 64 mA II = 30 mA VI = VCC or GND Other inputs at VCC or GND 3 5.5 14 5 5 20 7 7 MIN TYP MAX 1.2 10 ±1 3 2.5 UNIT V µA µA mA pF pF
ron¶ VCC = 4.5 V
VI = 2.4 V, II = 15 mA 8 12 All typical values are at VCC = 5 V (unless otherwise noted), TA = 25°C. § This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. ¶ Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by the lowest voltage of the two (A or B) terminals.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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